
Dao H. Nguyen
Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2283 |
| Issued Applications | 1976 |
| Pending Applications | 142 |
| Abandoned Applications | 191 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1090133
[patent_doc_number] => 06828650
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-07
[patent_title] => 'Bipolar junction transistor structure with improved current gain characteristics'
[patent_app_type] => B2
[patent_app_number] => 10/160940
[patent_app_country] => US
[patent_app_date] => 2002-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5028
[patent_no_of_claims] => 28
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[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/828/06828650.pdf
[firstpage_image] =>[orig_patent_app_number] => 10160940
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/160940 | Bipolar junction transistor structure with improved current gain characteristics | May 30, 2002 | Issued |
Array
(
[id] => 6701693
[patent_doc_number] => 20030224573
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-04
[patent_title] => 'HIGH PERFORMANCE LOGIC AND HIGH DENSITY EMBEDDED DRAM WITH BORDERLESS CONTACT AND ANTISPACER'
[patent_app_type] => new
[patent_app_number] => 10/160540
[patent_app_country] => US
[patent_app_date] => 2002-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7611
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20030224573.pdf
[firstpage_image] =>[orig_patent_app_number] => 10160540
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/160540 | High performance logic and high density embedded dram with borderless contact and antispacer | May 30, 2002 | Issued |
Array
(
[id] => 6385007
[patent_doc_number] => 20020179961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Nonvolatile semiconductor memory device and manufacturing method of nonvolatile semiconductor memory device'
[patent_app_type] => new
[patent_app_number] => 10/156142
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 7567
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20020179961.pdf
[firstpage_image] =>[orig_patent_app_number] => 10156142
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/156142 | Nonvolatile semiconductor memory device and manufacturing method of nonvolatile semiconductor memory device | May 28, 2002 | Abandoned |
Array
(
[id] => 7143922
[patent_doc_number] => 20040169198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-02
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/478800
[patent_app_country] => US
[patent_app_date] => 2003-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9020
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 128
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20040169198.pdf
[firstpage_image] =>[orig_patent_app_number] => 10478800
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/478800 | Semiconductor device | May 27, 2002 | Issued |
Array
(
[id] => 6546930
[patent_doc_number] => 20020163842
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-07
[patent_title] => 'Dram cell configuration and method for fabricating the dram cell configuration'
[patent_app_type] => new
[patent_app_number] => 10/156540
[patent_app_country] => US
[patent_app_date] => 2002-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4176
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0163/20020163842.pdf
[firstpage_image] =>[orig_patent_app_number] => 10156540
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/156540 | DRAM cell configuration and method for fabricating the DRAM cell configuration | May 27, 2002 | Issued |
Array
(
[id] => 1140872
[patent_doc_number] => 06781188
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-24
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => B2
[patent_app_number] => 10/153738
[patent_app_country] => US
[patent_app_date] => 2002-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 33
[patent_no_of_words] => 5436
[patent_no_of_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/781/06781188.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153738
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153738 | Nonvolatile semiconductor memory device | May 23, 2002 | Issued |
Array
(
[id] => 6820076
[patent_doc_number] => 20030218237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-27
[patent_title] => 'Apparatus and method for molding a semiconductor die package with enhanced thermal conductivity'
[patent_app_type] => new
[patent_app_number] => 10/154640
[patent_app_country] => US
[patent_app_date] => 2002-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6391
[patent_no_of_claims] => 74
[patent_no_of_ind_claims] => 6
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20030218237.pdf
[firstpage_image] =>[orig_patent_app_number] => 10154640
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/154640 | Methods for molding a semiconductor die package with enhanced thermal conductivity | May 23, 2002 | Issued |
Array
(
[id] => 6254368
[patent_doc_number] => 20020185661
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Semiconductor device and process for producing the same'
[patent_app_type] => new
[patent_app_number] => 10/152350
[patent_app_country] => US
[patent_app_date] => 2002-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 9701
[patent_no_of_claims] => 8
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20020185661.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152350
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152350 | Semiconductor device and process for producing the same | May 21, 2002 | Issued |
Array
(
[id] => 1274193
[patent_doc_number] => 06649542
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-18
[patent_title] => 'Multi-level type nonvolatile semiconductor memory device'
[patent_app_type] => B2
[patent_app_number] => 10/146949
[patent_app_country] => US
[patent_app_date] => 2002-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 10707
[patent_no_of_claims] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/649/06649542.pdf
[firstpage_image] =>[orig_patent_app_number] => 10146949
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/146949 | Multi-level type nonvolatile semiconductor memory device | May 16, 2002 | Issued |
Array
(
[id] => 6443361
[patent_doc_number] => 20020176972
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-28
[patent_title] => 'Contact chain for testing and its relevantly debugging method'
[patent_app_type] => new
[patent_app_number] => 10/145718
[patent_app_country] => US
[patent_app_date] => 2002-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3926
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0176/20020176972.pdf
[firstpage_image] =>[orig_patent_app_number] => 10145718
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/145718 | Contact chain for testing and its relevantly debugging method | May 15, 2002 | Abandoned |
Array
(
[id] => 998644
[patent_doc_number] => 06910812
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-28
[patent_title] => 'Small-scale optoelectronic package'
[patent_app_type] => utility
[patent_app_number] => 10/146550
[patent_app_country] => US
[patent_app_date] => 2002-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
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[patent_no_of_words] => 29528
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/910/06910812.pdf
[firstpage_image] =>[orig_patent_app_number] => 10146550
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/146550 | Small-scale optoelectronic package | May 14, 2002 | Issued |
Array
(
[id] => 1182031
[patent_doc_number] => 06740923
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-25
[patent_title] => 'Capacitor structure'
[patent_app_type] => B2
[patent_app_number] => 10/145250
[patent_app_country] => US
[patent_app_date] => 2002-05-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/740/06740923.pdf
[firstpage_image] =>[orig_patent_app_number] => 10145250
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/145250 | Capacitor structure | May 13, 2002 | Issued |
Array
(
[id] => 6742926
[patent_doc_number] => 20030020109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Nonvolatile semiconductor memory device and manufacturing method thereof'
[patent_app_type] => new
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[pdf_file] => publications/A1/0020/20030020109.pdf
[firstpage_image] =>[orig_patent_app_number] => 10139744
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139744 | Nonvolatile semiconductor memory device and manufacturing method thereof | May 6, 2002 | Issued |
Array
(
[id] => 972511
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[patent_title] => 'Optoelectronic substrate'
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/936/06936854.pdf
[firstpage_image] =>[orig_patent_app_number] => 10137350
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137350 | Optoelectronic substrate | May 2, 2002 | Issued |
Array
(
[id] => 5856289
[patent_doc_number] => 20020121640
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[patent_kind] => A1
[patent_issue_date] => 2002-09-05
[patent_title] => 'Active matrix electro-luminescent display with an organic leveling layer'
[patent_app_type] => new
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[pdf_file] => publications/A1/0121/20020121640.pdf
[firstpage_image] =>[orig_patent_app_number] => 10137040
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/137040 | Active matrix electro-luminescent display with an organic leveling layer | Apr 29, 2002 | Issued |
Array
(
[id] => 6627126
[patent_doc_number] => 20030102492
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-05
[patent_title] => 'METAL OXIDE SEMICONDUCTOR TRANSISTOR WITH SELF-ALIGNED CHANNEL IMPLANT'
[patent_app_type] => new
[patent_app_number] => 10/133556
[patent_app_country] => US
[patent_app_date] => 2002-04-26
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0102/20030102492.pdf
[firstpage_image] =>[orig_patent_app_number] => 10133556
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/133556 | Method of forming a metal oxide semiconductor transistor with self-aligned channel implant | Apr 25, 2002 | Issued |
Array
(
[id] => 5784816
[patent_doc_number] => 20020159316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-31
[patent_title] => 'Semiconductor memory cell and method of fabricating a semiconductor memory cell'
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[patent_app_number] => 10/133337
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[pdf_file] => publications/A1/0159/20020159316.pdf
[firstpage_image] =>[orig_patent_app_number] => 10133337
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/133337 | Semiconductor memory cell | Apr 25, 2002 | Issued |
Array
(
[id] => 6776717
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[firstpage_image] =>[orig_patent_app_number] => 10118580
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/118580 | Bow control in an electronic package | Apr 7, 2002 | Issued |
Array
(
[id] => 659690
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[patent_title] => 'Integrated circuit and seed layers'
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[firstpage_image] =>[orig_patent_app_number] => 10117041
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/117041 | Integrated circuit and seed layers | Apr 4, 2002 | Issued |
Array
(
[id] => 6733380
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[pdf_file] => publications/A1/0011/20030011015.pdf
[firstpage_image] =>[orig_patent_app_number] => 10115340
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/115340 | Capacitor with high dielectric constant materials | Apr 1, 2002 | Issued |