Search

Dao H. Nguyen

Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2283
Issued Applications
1976
Pending Applications
142
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17486000 [patent_doc_number] => 20220093504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => FOLDED CELL LAYOUT FOR 6T SRAM CELL [patent_app_type] => utility [patent_app_number] => 17/030830 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030830
Folded cell layout for 6T SRAM cell Sep 23, 2020 Issued
Array ( [id] => 17284149 [patent_doc_number] => 11201192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Memory device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/030425 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 54 [patent_no_of_words] => 22112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030425
Memory device and method of manufacturing the same Sep 23, 2020 Issued
Array ( [id] => 17262876 [patent_doc_number] => 20210375861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Backside Interconnect Structures for Semiconductor Devices and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 17/026870 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17026870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/026870
Backside interconnect structures for semiconductor devices and methods of forming the same Sep 20, 2020 Issued
Array ( [id] => 17486013 [patent_doc_number] => 20220093517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => DIRECT BONDING IN MICROELECTRONIC ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 17/025166 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/025166
Direct bonding in microelectronic assemblies Sep 17, 2020 Issued
Array ( [id] => 16560466 [patent_doc_number] => 20210005615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/024987 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024987 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/024987
Vertical memory devices and methods of manufacturing the same Sep 17, 2020 Issued
Array ( [id] => 17825809 [patent_doc_number] => 11430764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Overhang bridge interconnect [patent_app_type] => utility [patent_app_number] => 17/024056 [patent_app_country] => US [patent_app_date] => 2020-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6238 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024056 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/024056
Overhang bridge interconnect Sep 16, 2020 Issued
Array ( [id] => 16545023 [patent_doc_number] => 20200411438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => FLOATING-BRIDGE INTERCONNECTS AND METHODS OF ASSEMBLING SAME [patent_app_type] => utility [patent_app_number] => 17/021599 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021599 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021599
Floating-bridge interconnects and methods of assembling same Sep 14, 2020 Issued
Array ( [id] => 16928467 [patent_doc_number] => 11049959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => FinFET with dummy fins and methods of making the same [patent_app_type] => utility [patent_app_number] => 17/012222 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 56 [patent_no_of_words] => 11046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/012222
FinFET with dummy fins and methods of making the same Sep 3, 2020 Issued
Array ( [id] => 17381097 [patent_doc_number] => 11239129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Package cooling by coil cavity [patent_app_type] => utility [patent_app_number] => 17/006740 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5416 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006740 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006740
Package cooling by coil cavity Aug 27, 2020 Issued
Array ( [id] => 17448435 [patent_doc_number] => 20220068940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => MEMORY [patent_app_type] => utility [patent_app_number] => 17/004457 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004457 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004457
Memory Aug 26, 2020 Issued
Array ( [id] => 17730791 [patent_doc_number] => 11387192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/004087 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 12765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004087 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004087
Semiconductor package Aug 26, 2020 Issued
Array ( [id] => 17100201 [patent_doc_number] => 20210287992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/004244 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004244
Semiconductor device Aug 26, 2020 Issued
Array ( [id] => 18277193 [patent_doc_number] => 11616143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Semiconductor devices with backside power rail and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 17/005134 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 67 [patent_no_of_words] => 10220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005134 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/005134
Semiconductor devices with backside power rail and methods of fabrication thereof Aug 26, 2020 Issued
Array ( [id] => 17389418 [patent_doc_number] => 20220037270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => PACKAGED CIRCUIT STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/000660 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000660 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000660
Packaged circuit structure and method for manufacturing the same Aug 23, 2020 Issued
Array ( [id] => 18156563 [patent_doc_number] => 11569562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/997958 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 11476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997958 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997958
Semiconductor package and manufacturing method thereof Aug 19, 2020 Issued
Array ( [id] => 17607114 [patent_doc_number] => 11335606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Power rails for stacked semiconductor device [patent_app_type] => utility [patent_app_number] => 16/997062 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 9280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997062
Power rails for stacked semiconductor device Aug 18, 2020 Issued
Array ( [id] => 16487765 [patent_doc_number] => 20200381374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/997806 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997806
Semiconductor structure Aug 18, 2020 Issued
Array ( [id] => 17353268 [patent_doc_number] => 11227915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/996491 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 9089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996491 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996491
Semiconductor device Aug 17, 2020 Issued
Array ( [id] => 17070831 [patent_doc_number] => 20210273048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING SAME [patent_app_type] => utility [patent_app_number] => 16/996282 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996282 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996282
Semiconductor memory device and method of fabricating same Aug 17, 2020 Issued
Array ( [id] => 17239561 [patent_doc_number] => 11183452 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-23 [patent_title] => Transfering informations across a high voltage gap using capacitive coupling with DTI integrated in silicon technology [patent_app_type] => utility [patent_app_number] => 16/991342 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 14091 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991342 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991342
Transfering informations across a high voltage gap using capacitive coupling with DTI integrated in silicon technology Aug 11, 2020 Issued
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