Search

Dao H. Nguyen

Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2283
Issued Applications
1976
Pending Applications
142
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13598843 [patent_doc_number] => 20180350970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => CONTACT STRUCTURES, FINFET DEVICES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/043111 [patent_app_country] => US [patent_app_date] => 2018-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16043111 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/043111
Contact structures, FinFET devices and methods of forming the same Jul 22, 2018 Issued
Array ( [id] => 17862962 [patent_doc_number] => 11444124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Hybrid memristor/field-effect transistor memory cell and its information encoding scheme [patent_app_type] => utility [patent_app_number] => 16/630195 [patent_app_country] => US [patent_app_date] => 2018-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16630195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/630195
Hybrid memristor/field-effect transistor memory cell and its information encoding scheme Jul 10, 2018 Issued
Array ( [id] => 13833009 [patent_doc_number] => 20190019989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => ORGANIC EL ELEMENT, ORGANIC EL DISPLAY PANEL, AND METHOD OF MANUFACTURING ORGANIC EL DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/030389 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030389
Organic EL element, organic EL display panel, and method of manufacturing organic EL display panel Jul 8, 2018 Issued
Array ( [id] => 15332315 [patent_doc_number] => 20200006487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SELF-ALIGNED GATE EDGE ARCHITECTURE WITH ALTERNATE CHANNEL MATERIAL [patent_app_type] => utility [patent_app_number] => 16/024125 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024125 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024125
Self-aligned gate edge architecture with alternate channel material Jun 28, 2018 Issued
Array ( [id] => 13543473 [patent_doc_number] => 20180323283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => CLOSELY PACKED VERTICAL TRANSISTORS WITH REDUCED CONTACT RESISTANCE [patent_app_type] => utility [patent_app_number] => 16/023244 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023244 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/023244
Closely packed vertical transistors with reduced contact resistance Jun 28, 2018 Issued
Array ( [id] => 17638182 [patent_doc_number] => 11348916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Leave-behind protective layer having secondary purpose [patent_app_type] => utility [patent_app_number] => 16/024076 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11406 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024076 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024076
Leave-behind protective layer having secondary purpose Jun 28, 2018 Issued
Array ( [id] => 14317341 [patent_doc_number] => 20190148374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/013734 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9567 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013734
Integrated circuit device and method of manufacturing same Jun 19, 2018 Issued
Array ( [id] => 15547587 [patent_doc_number] => 10573583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Semiconductor device package with grooved substrate [patent_app_type] => utility [patent_app_number] => 16/013753 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4117 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013753 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013753
Semiconductor device package with grooved substrate Jun 19, 2018 Issued
Array ( [id] => 14933773 [patent_doc_number] => 20190302524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => DISPLAY DEVICE WITH OPTICAL REFLECTING LAYER FOR REDUCTION OF SCREEN DOOR EFFECT [patent_app_type] => utility [patent_app_number] => 16/013741 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013741 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013741
Display device with optical reflecting layer for reduction of screen door effect Jun 19, 2018 Issued
Array ( [id] => 17470270 [patent_doc_number] => 11276753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Transistor and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/634334 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 9335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16634334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/634334
Transistor and electronic apparatus Jun 14, 2018 Issued
Array ( [id] => 15109181 [patent_doc_number] => 10475923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-12 [patent_title] => Method and structure for forming vertical transistors with various gate lengths [patent_app_type] => utility [patent_app_number] => 16/008207 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7095 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008207 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008207
Method and structure for forming vertical transistors with various gate lengths Jun 13, 2018 Issued
Array ( [id] => 15519439 [patent_doc_number] => 10566318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Light emitting device package and display device using the same [patent_app_type] => utility [patent_app_number] => 16/008276 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5858 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008276 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008276
Light emitting device package and display device using the same Jun 13, 2018 Issued
Array ( [id] => 13785399 [patent_doc_number] => 20190006238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => MANUFACTURING PROCESS OF ELEMENT CHIP AND SUBSTRATE HEATING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/008280 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008280 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008280
Manufacturing process of element chip and substrate heating apparatus Jun 13, 2018 Issued
Array ( [id] => 15286275 [patent_doc_number] => 10515807 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-24 [patent_title] => Methods of fabricating semiconductor devices with metal-gate work-function tuning layers [patent_app_type] => utility [patent_app_number] => 16/008321 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 8947 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008321 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008321
Methods of fabricating semiconductor devices with metal-gate work-function tuning layers Jun 13, 2018 Issued
Array ( [id] => 15139259 [patent_doc_number] => 10483113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Wiring board, TFT substrate, method for manufacturing wiring board, and method for manufacturing TFT substrate [patent_app_type] => utility [patent_app_number] => 16/008256 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 5094 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008256 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008256
Wiring board, TFT substrate, method for manufacturing wiring board, and method for manufacturing TFT substrate Jun 13, 2018 Issued
Array ( [id] => 15274645 [patent_doc_number] => 20190386057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SMALL PIXELS HAVING DUAL CONVERSION GAIN PROVIDING HIGH DYNAMIC RANGE [patent_app_type] => utility [patent_app_number] => 16/008434 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008434 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008434
Small pixels having dual conversion gain providing high dynamic range Jun 13, 2018 Issued
Array ( [id] => 13963277 [patent_doc_number] => 20190057983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => ARRAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/003416 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16003416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/003416
Array substrate and display device Jun 7, 2018 Issued
Array ( [id] => 14603947 [patent_doc_number] => 10355172 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-16 [patent_title] => Self-alignment of optical structures to random array of printed micro-LEDs [patent_app_type] => utility [patent_app_number] => 16/003432 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3704 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16003432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/003432
Self-alignment of optical structures to random array of printed micro-LEDs Jun 7, 2018 Issued
Array ( [id] => 14955233 [patent_doc_number] => 10438895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-08 [patent_title] => Flexible micro-module [patent_app_type] => utility [patent_app_number] => 16/003389 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2574 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16003389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/003389
Flexible micro-module Jun 7, 2018 Issued
Array ( [id] => 14446317 [patent_doc_number] => 20190181032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/003501 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16003501 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/003501
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Jun 7, 2018 Abandoned
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