Dao H. Nguyen

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14804825 [patent_doc_number] => 10405433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method for manufacturing an integrated circuit package [patent_app_type] => utility [patent_app_number] => 15/945418 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7623 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15945418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15109209 [patent_doc_number] => 10475937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-12 [patent_title] => Optical sensor packages employing cloaking layers [patent_app_type] => utility [patent_app_number] => 15/941765 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 55 [patent_no_of_words] => 17561 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15941765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14317623 [patent_doc_number] => 20190148515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/941798 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15941798 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14366943 [patent_doc_number] => 10304784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 15/938181 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 8408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15109167 [patent_doc_number] => 10475916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/938176 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7051 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938176 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14125793 [patent_doc_number] => 10249762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors [patent_app_type] => utility [patent_app_number] => 15/938367 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5578 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13878927 [patent_doc_number] => 20190035804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => VERTICAL-TYPE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/938101 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14938581 [patent_doc_number] => 20190304929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => ADVANCED CRACK STOP STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/938207 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15250163 [patent_doc_number] => 10510610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Structure and method of forming fin device having improved fin liner [patent_app_type] => utility [patent_app_number] => 15/938255 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5498 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13996399 [patent_doc_number] => 20190067357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => INCREASED OPTICAL PATH FOR LONG WAVELENGTH LIGHT BY GRATING STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/938066 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938066 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15169929 [patent_doc_number] => 10490468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Semiconductor structure with conductive structure [patent_app_type] => utility [patent_app_number] => 15/938324 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14938579 [patent_doc_number] => 20190304928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => ADVANCED CRACK STOP STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/938155 [patent_app_country] => US [patent_app_date] => 2018-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15938155 [rel_patent_id] =>[rel_patent_doc_number] =>)