Search

Dao H. Nguyen

Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2283
Issued Applications
1976
Pending Applications
142
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11424853 [patent_doc_number] => 20170033000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'TRENCH FORMATION FOR DIELECTRIC FILLED CUT REGION' [patent_app_type] => utility [patent_app_number] => 14/810143 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5417 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810143 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/810143
Trench formation for dielectric filled cut region Jul 26, 2015 Issued
Array ( [id] => 13019185 [patent_doc_number] => 10032710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Via pattern to reduce crosstalk between differential signal pairs [patent_app_type] => utility [patent_app_number] => 14/807823 [patent_app_country] => US [patent_app_date] => 2015-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4257 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14807823 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/807823
Via pattern to reduce crosstalk between differential signal pairs Jul 22, 2015 Issued
Array ( [id] => 10193121 [patent_doc_number] => 09222017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-29 [patent_title] => 'Method of manufacturing fluoride phosphor' [patent_app_type] => utility [patent_app_number] => 14/804337 [patent_app_country] => US [patent_app_date] => 2015-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 8071 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14804337 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/804337
Method of manufacturing fluoride phosphor Jul 20, 2015 Issued
Array ( [id] => 11811540 [patent_doc_number] => 09716115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-25 [patent_title] => 'Flexible display and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/805127 [patent_app_country] => US [patent_app_date] => 2015-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4396 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14805127 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/805127
Flexible display and method of manufacturing the same Jul 20, 2015 Issued
Array ( [id] => 13893679 [patent_doc_number] => 10199395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Metal oxide thin film transistor and manufacturing method thereof, display substrate and display device [patent_app_type] => utility [patent_app_number] => 15/122902 [patent_app_country] => US [patent_app_date] => 2015-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15122902 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/122902
Metal oxide thin film transistor and manufacturing method thereof, display substrate and display device Jul 16, 2015 Issued
Array ( [id] => 11386062 [patent_doc_number] => 20170012118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'SEMICONDUCTOR DEVICE WITH NON-UNIFORM TRENCH OXIDE LAYER' [patent_app_type] => utility [patent_app_number] => 14/794164 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5277 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794164 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794164
Semiconductor device with non-uniform trench oxide layer Jul 7, 2015 Issued
Array ( [id] => 11187548 [patent_doc_number] => 09418959 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-16 [patent_title] => 'Systems of bonded substrates' [patent_app_type] => utility [patent_app_number] => 14/794286 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794286 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794286
Systems of bonded substrates Jul 7, 2015 Issued
Array ( [id] => 11417576 [patent_doc_number] => 09564410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Semiconductor devices having metal bumps with flange' [patent_app_type] => utility [patent_app_number] => 14/793813 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793813 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793813
Semiconductor devices having metal bumps with flange Jul 7, 2015 Issued
Array ( [id] => 11791723 [patent_doc_number] => 09401366 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-26 [patent_title] => 'Layout pattern for 8T-SRAM and the manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/792636 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3584 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792636 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792636
Layout pattern for 8T-SRAM and the manufacturing method thereof Jul 6, 2015 Issued
Array ( [id] => 11014518 [patent_doc_number] => 20160211471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'STRETCHABLE DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/792866 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3385 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792866 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792866
Stretchable display device Jul 6, 2015 Issued
Array ( [id] => 11321641 [patent_doc_number] => 09520389 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-13 [patent_title] => 'Silicon-controlled rectifier and an ESD clamp circuit' [patent_app_type] => utility [patent_app_number] => 14/793598 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 3727 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793598 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793598
Silicon-controlled rectifier and an ESD clamp circuit Jul 6, 2015 Issued
Array ( [id] => 11687322 [patent_doc_number] => 09685373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'Conductive plug and method of forming the same' [patent_app_type] => utility [patent_app_number] => 14/793029 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4010 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793029 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793029
Conductive plug and method of forming the same Jul 6, 2015 Issued
Array ( [id] => 11315465 [patent_doc_number] => 20160351575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/793714 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793714 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793714
Semiconductor structure and method of forming the same Jul 6, 2015 Issued
Array ( [id] => 11466986 [patent_doc_number] => 09583627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 14/793721 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3113 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793721 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/793721
Semiconductor device and method for fabricating the same Jul 6, 2015 Issued
Array ( [id] => 11385975 [patent_doc_number] => 20170012031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'METHODS OF MAKING SEMICONDUCTOR DEVICE PACKAGES AND RELATED SEMICONDUCTOR DEVICE PACKAGES' [patent_app_type] => utility [patent_app_number] => 14/792970 [patent_app_country] => US [patent_app_date] => 2015-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7197 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792970 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792970
Methods of making semiconductor device packages and related semiconductor device packages Jul 6, 2015 Issued
Array ( [id] => 11339588 [patent_doc_number] => 20160365344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/792591 [patent_app_country] => US [patent_app_date] => 2015-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3532 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792591 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/792591
Semiconductor structure and manufacturing method thereof Jul 5, 2015 Issued
Array ( [id] => 10426178 [patent_doc_number] => 20150311189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'LOW NOISE AND HIGH PERFORMANCE LSI DEVICE' [patent_app_type] => utility [patent_app_number] => 14/791770 [patent_app_country] => US [patent_app_date] => 2015-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 10404 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14791770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/791770
Low noise and high performance LSI device Jul 5, 2015 Issued
Array ( [id] => 11273718 [patent_doc_number] => 20160336265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/789994 [patent_app_country] => US [patent_app_date] => 2015-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2537 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14789994 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/789994
Semiconductor device and method for fabricating the same Jul 1, 2015 Issued
Array ( [id] => 11367131 [patent_doc_number] => 20170005113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES' [patent_app_type] => utility [patent_app_number] => 14/790919 [patent_app_country] => US [patent_app_date] => 2015-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14790919 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/790919
Porous silicon relaxation medium for dislocation free CMOS devices Jul 1, 2015 Issued
Array ( [id] => 11194310 [patent_doc_number] => 09425129 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-23 [patent_title] => 'Methods for fabricating conductive vias of circuit structures' [patent_app_type] => utility [patent_app_number] => 14/789160 [patent_app_country] => US [patent_app_date] => 2015-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14789160 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/789160
Methods for fabricating conductive vias of circuit structures Jun 30, 2015 Issued
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