Search

Dao H. Nguyen

Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2283
Issued Applications
1976
Pending Applications
142
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8533814 [patent_doc_number] => 08309972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'LEDs with efficient electrode structures' [patent_app_type] => utility [patent_app_number] => 13/358114 [patent_app_country] => US [patent_app_date] => 2012-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 63 [patent_no_of_words] => 10808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13358114 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358114
LEDs with efficient electrode structures Jan 24, 2012 Issued
Array ( [id] => 8386636 [patent_doc_number] => 08264037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/354925 [patent_app_country] => US [patent_app_date] => 2012-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5043 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13354925 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/354925
Semiconductor device and method of manufacturing semiconductor device Jan 19, 2012 Issued
Array ( [id] => 8738765 [patent_doc_number] => 08410536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Substrate with embedded patterned capacitance' [patent_app_type] => utility [patent_app_number] => 13/345227 [patent_app_country] => US [patent_app_date] => 2012-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4587 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13345227 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/345227
Substrate with embedded patterned capacitance Jan 5, 2012 Issued
Array ( [id] => 8172526 [patent_doc_number] => 20120107964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'LOW-COST NON-VOLATILE FLASH-RAM MEMORY' [patent_app_type] => utility [patent_app_number] => 13/345608 [patent_app_country] => US [patent_app_date] => 2012-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12817 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20120107964.pdf [firstpage_image] =>[orig_patent_app_number] => 13345608 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/345608
Low-cost non-volatile flash-RAM memory Jan 5, 2012 Issued
Array ( [id] => 9018120 [patent_doc_number] => RE044482 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2013-09-10 [patent_title] => 'CMOS active image sensor with common pixel transistors and binning capability' [patent_app_type] => reissue [patent_app_number] => 13/343843 [patent_app_country] => US [patent_app_date] => 2012-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1306 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13343843 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/343843
CMOS active image sensor with common pixel transistors and binning capability Jan 4, 2012 Issued
Array ( [id] => 10950570 [patent_doc_number] => 20140353591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'TRANSISTOR USING SINGLE CRYSTAL SILICON NANOWIRE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 14/370212 [patent_app_country] => US [patent_app_date] => 2012-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3651 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14370212 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/370212
Transistor using single crystal silicon nanowire and method for manufacturing same Jan 3, 2012 Issued
Array ( [id] => 10864507 [patent_doc_number] => 08890214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Method of manufacturing sidewall spacers on a memory device' [patent_app_type] => utility [patent_app_number] => 13/335578 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5223 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335578 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335578
Method of manufacturing sidewall spacers on a memory device Dec 21, 2011 Issued
Array ( [id] => 9355814 [patent_doc_number] => 08674351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Semiconductor device and semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/334850 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 67 [patent_no_of_words] => 28638 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334850
Semiconductor device and semiconductor memory device Dec 21, 2011 Issued
Array ( [id] => 9576010 [patent_doc_number] => 08766427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'RF-power device' [patent_app_type] => utility [patent_app_number] => 13/334637 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3767 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334637 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334637
RF-power device Dec 21, 2011 Issued
Array ( [id] => 8888622 [patent_doc_number] => 20130161806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'WINDOW CLAMP TOP PLATE FOR INTEGRATED CIRCUIT PACKAGING' [patent_app_type] => utility [patent_app_number] => 13/335467 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3085 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335467 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335467
Window clamp top plate for integrated circuit packaging Dec 21, 2011 Issued
Array ( [id] => 9648948 [patent_doc_number] => 08802963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Thermoelectric conversion material' [patent_app_type] => utility [patent_app_number] => 13/335114 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2698 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335114 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335114
Thermoelectric conversion material Dec 21, 2011 Issued
Array ( [id] => 8888578 [patent_doc_number] => 20130161762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'GATE STRUCTURE FOR SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/335431 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335431 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335431
Gate structure for semiconductor device Dec 21, 2011 Issued
Array ( [id] => 8356600 [patent_doc_number] => 20120211762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ELECTRONIC CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/334766 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4612 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334766 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334766
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ELECTRONIC CIRCUIT Dec 21, 2011 Abandoned
Array ( [id] => 9704505 [patent_doc_number] => 08829574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Method and system for a GaN vertical JFET with self-aligned source and gate' [patent_app_type] => utility [patent_app_number] => 13/334514 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7577 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334514
Method and system for a GaN vertical JFET with self-aligned source and gate Dec 21, 2011 Issued
Array ( [id] => 8274851 [patent_doc_number] => 20120168723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'ELECTRONIC DEVICES INCLUDING GRAPHENE AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/335709 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5407 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335709 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335709
ELECTRONIC DEVICES INCLUDING GRAPHENE AND METHODS OF FORMING THE SAME Dec 21, 2011 Abandoned
Array ( [id] => 9575812 [patent_doc_number] => 08766226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Non-volatile semiconductor storage device and manufacturing method of non-volatile semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 13/334848 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 36 [patent_no_of_words] => 10793 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334848
Non-volatile semiconductor storage device and manufacturing method of non-volatile semiconductor storage device Dec 21, 2011 Issued
Array ( [id] => 8261726 [patent_doc_number] => 20120161155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'SILICON CARBIDE SUBSTRATE, SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SILICON CARBIDE SUBSTRATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/334855 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8640 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334855 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334855
Silicon carbide substrate, semiconductor device, method of manufacturing silicon carbide substrate and method of manufacturing semiconductor device Dec 21, 2011 Issued
Array ( [id] => 8261788 [patent_doc_number] => 20120161219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/334964 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5421 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13334964 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/334964
Semiconductor device Dec 21, 2011 Issued
Array ( [id] => 8888550 [patent_doc_number] => 20130161734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'TRANSISTOR STRUCTURE AND METHOD FOR PREPARING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/335318 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2646 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335318 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335318
TRANSISTOR STRUCTURE AND METHOD FOR PREPARING THE SAME Dec 21, 2011 Abandoned
Array ( [id] => 8261903 [patent_doc_number] => 20120161329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'MULTI-LEVEL INTEGRATED CIRCUIT, DEVICE AND METHOD FOR MODELING MULTI-LEVEL INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 13/335213 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8038 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335213 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335213
Multi-level integrated circuit, device and method for modeling multi-level integrated circuits Dec 21, 2011 Issued
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