Search

Dao H. Nguyen

Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2283
Issued Applications
1976
Pending Applications
142
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5334500 [patent_doc_number] => 20090050964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'METHOD FOR MANUFACTURING THIN FILM INTEGRATED CIRCUIT, AND ELEMENT SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/255117 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 18510 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20090050964.pdf [firstpage_image] =>[orig_patent_app_number] => 12255117 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255117
Method for manufacturing thin film integrated circuit, and element substrate Oct 20, 2008 Issued
Array ( [id] => 5361106 [patent_doc_number] => 20090035900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'Method of Forming High Density Trench FET with Integrated Schottky Diode' [patent_app_type] => utility [patent_app_number] => 12/249889 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4751 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20090035900.pdf [firstpage_image] =>[orig_patent_app_number] => 12249889 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/249889
Method of forming high density trench FET with integrated Schottky diode Oct 9, 2008 Issued
Array ( [id] => 4435171 [patent_doc_number] => 07898012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Capacitor and semiconductor device having a ferroelectric material' [patent_app_type] => utility [patent_app_number] => 12/285156 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 7652 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/898/07898012.pdf [firstpage_image] =>[orig_patent_app_number] => 12285156 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/285156
Capacitor and semiconductor device having a ferroelectric material Sep 29, 2008 Issued
Array ( [id] => 5401271 [patent_doc_number] => 20090236584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'LIGHT-EMITTING DEVICE WITH ENHANCED LUMINOUS EFFICIENCY AND METHOD OF PRODUCING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/212406 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9829 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20090236584.pdf [firstpage_image] =>[orig_patent_app_number] => 12212406 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212406
Light-emitting device with enhanced luminous efficiency and method of producing the same Sep 16, 2008 Issued
Array ( [id] => 5539318 [patent_doc_number] => 20090221123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'METHOD FOR INCREASING PENETRATION DEPTH OF DRAIN AND SOURCE IMPLANTATION SPECIES FOR A GIVEN GATE HEIGHT' [patent_app_type] => utility [patent_app_number] => 12/205221 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20090221123.pdf [firstpage_image] =>[orig_patent_app_number] => 12205221 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205221
Method for increasing penetration depth of drain and source implantation species for a given gate height Sep 4, 2008 Issued
Array ( [id] => 8318846 [patent_doc_number] => 08233635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Audio signal transmitting apparatus, audio signal receiving apparatus, audio signal transmission system, audio signal transmission method, and program' [patent_app_type] => utility [patent_app_number] => 12/229877 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 14462 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12229877 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/229877
Audio signal transmitting apparatus, audio signal receiving apparatus, audio signal transmission system, audio signal transmission method, and program Aug 26, 2008 Issued
Array ( [id] => 5446536 [patent_doc_number] => 20090047762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'APPARATUS AND METHOD FOR A MEMORY ARRAY WITH SHALLOW TRENCH ISOLATION REGIONS BETWEEN BIT LINES FOR INCREASED PROCESS MARGINS' [patent_app_type] => utility [patent_app_number] => 12/187276 [patent_app_country] => US [patent_app_date] => 2008-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4904 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20090047762.pdf [firstpage_image] =>[orig_patent_app_number] => 12187276 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/187276
Apparatus and method for a memory array with shallow trench isolation regions between bit lines for increased process margins Aug 5, 2008 Issued
Array ( [id] => 6342390 [patent_doc_number] => 20100020473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'SUBSTRATE WITH EMBEDDED PATTERNED CAPACITANCE' [patent_app_type] => utility [patent_app_number] => 12/180768 [patent_app_country] => US [patent_app_date] => 2008-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4556 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20100020473.pdf [firstpage_image] =>[orig_patent_app_number] => 12180768 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/180768
Substrate with embedded patterned capacitance Jul 27, 2008 Issued
Array ( [id] => 4852630 [patent_doc_number] => 20080318373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Method of fabricating self-aligned bipolar transistor having tapered collector' [patent_app_type] => utility [patent_app_number] => 12/220521 [patent_app_country] => US [patent_app_date] => 2008-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5723 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318373.pdf [firstpage_image] =>[orig_patent_app_number] => 12220521 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/220521
Method of fabricating self-aligned bipolar transistor having tapered collector Jul 24, 2008 Issued
Array ( [id] => 91945 [patent_doc_number] => 07732279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Semiconductor device with improved overlay margin and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/180250 [patent_app_country] => US [patent_app_date] => 2008-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 36 [patent_no_of_words] => 6177 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732279.pdf [firstpage_image] =>[orig_patent_app_number] => 12180250 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/180250
Semiconductor device with improved overlay margin and method of manufacturing the same Jul 24, 2008 Issued
Array ( [id] => 6336507 [patent_doc_number] => 20100019330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'DEVICE STRUCTURES WITH A SELF-ALIGNED DAMAGE LAYER AND METHODS FOR FORMING SUCH DEVICE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 12/178766 [patent_app_country] => US [patent_app_date] => 2008-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7266 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20100019330.pdf [firstpage_image] =>[orig_patent_app_number] => 12178766 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/178766
Device structures with a self-aligned damage layer and methods for forming such device structures Jul 23, 2008 Issued
Array ( [id] => 4480865 [patent_doc_number] => 07869279 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-11 [patent_title] => 'EEPROM memory device and method of programming memory cell having N erase pocket and program and access transistors' [patent_app_type] => utility [patent_app_number] => 12/176236 [patent_app_country] => US [patent_app_date] => 2008-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6923 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/869/07869279.pdf [firstpage_image] =>[orig_patent_app_number] => 12176236 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/176236
EEPROM memory device and method of programming memory cell having N erase pocket and program and access transistors Jul 17, 2008 Issued
Array ( [id] => 9324922 [patent_doc_number] => 08659952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Method of operating non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/169142 [patent_app_country] => US [patent_app_date] => 2008-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2186 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12169142 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/169142
Method of operating non-volatile memory Jul 7, 2008 Issued
Array ( [id] => 8549194 [patent_doc_number] => 08324075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Methods for recycling substrates and fabricating laminated wafers' [patent_app_type] => utility [patent_app_number] => 12/663254 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 6752 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12663254 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/663254
Methods for recycling substrates and fabricating laminated wafers Jun 23, 2008 Issued
Array ( [id] => 5346225 [patent_doc_number] => 20090001586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'INTEGRATED CIRCUIT AND SEED LAYERS' [patent_app_type] => utility [patent_app_number] => 12/145382 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 16418 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001586.pdf [firstpage_image] =>[orig_patent_app_number] => 12145382 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/145382
Integrated circuit and seed layers Jun 23, 2008 Issued
Array ( [id] => 5346072 [patent_doc_number] => 20090001433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Image Sensor and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 12/145335 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3335 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001433.pdf [firstpage_image] =>[orig_patent_app_number] => 12145335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/145335
Image Sensor and Method for Manufacturing the Same Jun 23, 2008 Abandoned
Array ( [id] => 23538 [patent_doc_number] => 07795068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Method of making integrated circuit (IC) including at least one storage cell' [patent_app_type] => utility [patent_app_number] => 12/136158 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3298 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/795/07795068.pdf [firstpage_image] =>[orig_patent_app_number] => 12136158 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/136158
Method of making integrated circuit (IC) including at least one storage cell Jun 9, 2008 Issued
Array ( [id] => 112742 [patent_doc_number] => 07719050 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-18 [patent_title] => 'Low power electrically alterable nonvolatile memory cells and arrays' [patent_app_type] => utility [patent_app_number] => 12/157380 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 34 [patent_no_of_words] => 20668 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719050.pdf [firstpage_image] =>[orig_patent_app_number] => 12157380 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/157380
Low power electrically alterable nonvolatile memory cells and arrays Jun 9, 2008 Issued
Array ( [id] => 4558136 [patent_doc_number] => 07821088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Spin transfer magnetic element with free layers having high perpendicular anisotropy and in-plan equilibrium magnetization' [patent_app_type] => utility [patent_app_number] => 12/133671 [patent_app_country] => US [patent_app_date] => 2008-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 10193 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/821/07821088.pdf [firstpage_image] =>[orig_patent_app_number] => 12133671 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/133671
Spin transfer magnetic element with free layers having high perpendicular anisotropy and in-plan equilibrium magnetization Jun 4, 2008 Issued
Array ( [id] => 6524865 [patent_doc_number] => 20100220869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => ' AUDIO ANIMATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/159093 [patent_app_country] => US [patent_app_date] => 2008-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3618 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20100220869.pdf [firstpage_image] =>[orig_patent_app_number] => 12159093 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/159093
AUDIO ANIMATION SYSTEM May 25, 2008 Abandoned
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