
Dao H. Nguyen
Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2283 |
| Issued Applications | 1976 |
| Pending Applications | 142 |
| Abandoned Applications | 191 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7225897
[patent_doc_number] => 20050078540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-14
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/956140
[patent_app_country] => US
[patent_app_date] => 2004-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5062
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0078/20050078540.pdf
[firstpage_image] =>[orig_patent_app_number] => 10956140
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/956140 | Semiconductor device | Oct 3, 2004 | Issued |
Array
(
[id] => 7228488
[patent_doc_number] => 20050269635
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-08
[patent_title] => 'Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics'
[patent_app_type] => utility
[patent_app_number] => 10/957342
[patent_app_country] => US
[patent_app_date] => 2004-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 10751
[patent_no_of_claims] => 75
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0269/20050269635.pdf
[firstpage_image] =>[orig_patent_app_number] => 10957342
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/957342 | Selective implementation of barrier layers to achieve threshold voltage control in CMOS device fabrication with high-k dielectrics | Sep 30, 2004 | Issued |
Array
(
[id] => 7125126
[patent_doc_number] => 20050056870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Stress sensitive microchip with premolded-type package'
[patent_app_type] => utility
[patent_app_number] => 10/952330
[patent_app_country] => US
[patent_app_date] => 2004-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5120
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20050056870.pdf
[firstpage_image] =>[orig_patent_app_number] => 10952330
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/952330 | Stress sensitive microchip with premolded-type package | Sep 27, 2004 | Abandoned |
Array
(
[id] => 754352
[patent_doc_number] => 07018911
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Methods for fabrication for phase-changeable memory devices having phase-changeable material regions with lateral contacts'
[patent_app_type] => utility
[patent_app_number] => 10/940141
[patent_app_country] => US
[patent_app_date] => 2004-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 7750
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/018/07018911.pdf
[firstpage_image] =>[orig_patent_app_number] => 10940141
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/940141 | Methods for fabrication for phase-changeable memory devices having phase-changeable material regions with lateral contacts | Sep 13, 2004 | Issued |
Array
(
[id] => 7603162
[patent_doc_number] => 07235872
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-06-26
[patent_title] => 'Bow control in an electronic package'
[patent_app_type] => utility
[patent_app_number] => 10/931844
[patent_app_country] => US
[patent_app_date] => 2004-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 2175
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 12
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/235/07235872.pdf
[firstpage_image] =>[orig_patent_app_number] => 10931844
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/931844 | Bow control in an electronic package | Aug 30, 2004 | Issued |
Array
(
[id] => 7022976
[patent_doc_number] => 20050017370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-27
[patent_title] => 'Memory device having a semiconducting polymer film'
[patent_app_type] => utility
[patent_app_number] => 10/923482
[patent_app_country] => US
[patent_app_date] => 2004-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7866
[patent_no_of_claims] => 29
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0017/20050017370.pdf
[firstpage_image] =>[orig_patent_app_number] => 10923482
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/923482 | Memory device having a semiconducting polymer film | Aug 19, 2004 | Issued |
Array
(
[id] => 7083302
[patent_doc_number] => 20050048682
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Method for fabricating a group III nitride semiconductor laser device'
[patent_app_type] => utility
[patent_app_number] => 10/917514
[patent_app_country] => US
[patent_app_date] => 2004-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8821
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 0
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0048/20050048682.pdf
[firstpage_image] =>[orig_patent_app_number] => 10917514
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/917514 | Method for fabricating a group III nitride semiconductor laser device | Aug 12, 2004 | Issued |
Array
(
[id] => 7114335
[patent_doc_number] => 20050067635
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-31
[patent_title] => 'Method of manufacturing electronic component, method of manufacturing electro-optical device, electronic component, and electro-optical device'
[patent_app_type] => utility
[patent_app_number] => 10/916609
[patent_app_country] => US
[patent_app_date] => 2004-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9411
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0067/20050067635.pdf
[firstpage_image] =>[orig_patent_app_number] => 10916609
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/916609 | Method of manufacturing electronic component, method of manufacturing electro-optical device, electronic component, and electro-optical device | Aug 11, 2004 | Abandoned |
Array
(
[id] => 6904464
[patent_doc_number] => 20050099859
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-12
[patent_title] => 'Floating-gate semiconductor structures'
[patent_app_type] => utility
[patent_app_number] => 10/914968
[patent_app_country] => US
[patent_app_date] => 2004-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 40
[patent_no_of_words] => 16584
[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0099/20050099859.pdf
[firstpage_image] =>[orig_patent_app_number] => 10914968
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/914968 | Floating-gate semiconductor structures | Aug 8, 2004 | Issued |
Array
(
[id] => 672925
[patent_doc_number] => 07091528
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-15
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/902120
[patent_app_country] => US
[patent_app_date] => 2004-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 4131
[patent_no_of_claims] => 9
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[patent_words_short_claim] => 158
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/091/07091528.pdf
[firstpage_image] =>[orig_patent_app_number] => 10902120
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/902120 | Semiconductor device | Jul 29, 2004 | Issued |
Array
(
[id] => 440160
[patent_doc_number] => 07259420
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Multiple-gate device with floating back gate'
[patent_app_type] => utility
[patent_app_number] => 10/710680
[patent_app_country] => US
[patent_app_date] => 2004-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_no_of_words] => 2219
[patent_no_of_claims] => 21
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/259/07259420.pdf
[firstpage_image] =>[orig_patent_app_number] => 10710680
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/710680 | Multiple-gate device with floating back gate | Jul 27, 2004 | Issued |
| 10/897808 | Electrically alterable memory cell | Jul 23, 2004 | Abandoned |
Array
(
[id] => 7150720
[patent_doc_number] => 20050024958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Power supply device'
[patent_app_type] => utility
[patent_app_number] => 10/896170
[patent_app_country] => US
[patent_app_date] => 2004-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0024/20050024958.pdf
[firstpage_image] =>[orig_patent_app_number] => 10896170
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/896170 | Power supply device | Jul 21, 2004 | Issued |
Array
(
[id] => 668832
[patent_doc_number] => 07095076
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-08-22
[patent_title] => 'Electrically-alterable non-volatile memory cell'
[patent_app_type] => utility
[patent_app_number] => 10/897185
[patent_app_country] => US
[patent_app_date] => 2004-07-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/095/07095076.pdf
[firstpage_image] =>[orig_patent_app_number] => 10897185
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/897185 | Electrically-alterable non-volatile memory cell | Jul 20, 2004 | Issued |
Array
(
[id] => 7022953
[patent_doc_number] => 20050017347
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-27
[patent_title] => 'Circuit module and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/895050
[patent_app_country] => US
[patent_app_date] => 2004-07-21
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0017/20050017347.pdf
[firstpage_image] =>[orig_patent_app_number] => 10895050
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/895050 | Circuit module and manufacturing method thereof | Jul 20, 2004 | Abandoned |
Array
(
[id] => 668827
[patent_doc_number] => 07095071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-22
[patent_title] => 'Magnetic random access memory'
[patent_app_type] => utility
[patent_app_number] => 10/895074
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[pdf_file] => patents/07/095/07095071.pdf
[firstpage_image] =>[orig_patent_app_number] => 10895074
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/895074 | Magnetic random access memory | Jul 20, 2004 | Issued |
Array
(
[id] => 7140234
[patent_doc_number] => 20050116360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-02
[patent_title] => 'Complementary field-effect transistors and methods of manufacture'
[patent_app_type] => utility
[patent_app_number] => 10/896270
[patent_app_country] => US
[patent_app_date] => 2004-07-21
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[pdf_file] => publications/A1/0116/20050116360.pdf
[firstpage_image] =>[orig_patent_app_number] => 10896270
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/896270 | Complementary field-effect transistors and methods of manufacture | Jul 20, 2004 | Abandoned |
Array
(
[id] => 803608
[patent_doc_number] => 07423312
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-09-09
[patent_title] => 'Apparatus and method for a memory array with shallow trench isolation regions between bit lines for increased process margins'
[patent_app_type] => utility
[patent_app_number] => 10/896292
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[patent_app_date] => 2004-07-20
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[pdf_file] => patents/07/423/07423312.pdf
[firstpage_image] =>[orig_patent_app_number] => 10896292
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/896292 | Apparatus and method for a memory array with shallow trench isolation regions between bit lines for increased process margins | Jul 19, 2004 | Issued |
Array
(
[id] => 7080583
[patent_doc_number] => 20050045963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Charge trapping memory cell'
[patent_app_type] => utility
[patent_app_number] => 10/894348
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[pdf_file] => publications/A1/0045/20050045963.pdf
[firstpage_image] =>[orig_patent_app_number] => 10894348
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/894348 | Charge trapping memory cell | Jul 18, 2004 | Issued |
Array
(
[id] => 7080653
[patent_doc_number] => 20050046033
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Tape circuit substrate and semiconductor chip package using the same'
[patent_app_type] => utility
[patent_app_number] => 10/892360
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[pdf_file] => publications/A1/0046/20050046033.pdf
[firstpage_image] =>[orig_patent_app_number] => 10892360
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/892360 | Tape circuit substrate and semiconductor chip package using the same | Jul 15, 2004 | Issued |