Search

Daquan Zhao

Examiner (ID: 9543, Phone: (571)270-1119 , Office: P/2484 )

Most Active Art Unit
2484
Art Unit(s)
2621, 2484
Total Applications
1279
Issued Applications
938
Pending Applications
75
Abandoned Applications
286

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3575491 [patent_doc_number] => 05539227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Multi-layer wiring' [patent_app_type] => 1 [patent_app_number] => 8/510184 [patent_app_country] => US [patent_app_date] => 1995-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2810 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539227.pdf [firstpage_image] =>[orig_patent_app_number] => 510184 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510184
Multi-layer wiring Aug 1, 1995 Issued
Array ( [id] => 3637988 [patent_doc_number] => 05631476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'MOS-technology power device chip and package assembly' [patent_app_type] => 1 [patent_app_number] => 8/509956 [patent_app_country] => US [patent_app_date] => 1995-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2190 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631476.pdf [firstpage_image] =>[orig_patent_app_number] => 509956 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509956
MOS-technology power device chip and package assembly Jul 31, 1995 Issued
08/448506 BIPOLAR TRANSISTOR Jul 30, 1995 Abandoned
08/495488 INSULATION LAYER SYSTEM FOR THE ELECTRICAL ISOLATION OF CIRCUITS Jul 24, 1995 Abandoned
Array ( [id] => 3782316 [patent_doc_number] => 05818105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Semiconductor device with plastic material covering a semiconductor chip mounted on a substrate of the device' [patent_app_type] => 1 [patent_app_number] => 8/505084 [patent_app_country] => US [patent_app_date] => 1995-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 9449 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818105.pdf [firstpage_image] =>[orig_patent_app_number] => 505084 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/505084
Semiconductor device with plastic material covering a semiconductor chip mounted on a substrate of the device Jul 20, 1995 Issued
Array ( [id] => 3662309 [patent_doc_number] => 05627405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-06 [patent_title] => 'Integrated circuit assembly incorporating an anisotropic elecctrically conductive layer' [patent_app_type] => 1 [patent_app_number] => 8/503302 [patent_app_country] => US [patent_app_date] => 1995-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4075 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/627/05627405.pdf [firstpage_image] =>[orig_patent_app_number] => 503302 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/503302
Integrated circuit assembly incorporating an anisotropic elecctrically conductive layer Jul 16, 1995 Issued
08/503297 FORMATION OF SILICIDED JUNCTIONS IN DEEP SUBMICRON MOSFETS BY DEFECT ENHANCED COS12 FORMATION Jul 16, 1995 Abandoned
08/501142 METAL FOIL MATERIAL FOR COVERING SEMICONDUCTOR DEVICE AND METHOD FOR COVERING SEMICONDUCTOR DEVICE WITH THE METAL FOIL Jul 10, 1995 Abandoned
08/496162 SEMICONDUCTOR DEVICE COMPRISED OF TRANSISTORS HAVING DIFFERENT THRESHOLD VOLTAGES Jun 27, 1995 Abandoned
Array ( [id] => 3818021 [patent_doc_number] => 05710444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Insulated gate bipolar transistor having a coupling element' [patent_app_type] => 1 [patent_app_number] => 8/448505 [patent_app_country] => US [patent_app_date] => 1995-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1700 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710444.pdf [firstpage_image] =>[orig_patent_app_number] => 448505 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/448505
Insulated gate bipolar transistor having a coupling element Jun 7, 1995 Issued
Array ( [id] => 3692146 [patent_doc_number] => 05644161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Ultra-high density warp-resistant memory module' [patent_app_type] => 1 [patent_app_number] => 8/473593 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4311 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644161.pdf [firstpage_image] =>[orig_patent_app_number] => 473593 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473593
Ultra-high density warp-resistant memory module Jun 6, 1995 Issued
Array ( [id] => 3511329 [patent_doc_number] => 05569961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Semiconductor device having a multi-layer metallization structure' [patent_app_type] => 1 [patent_app_number] => 8/473050 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 30 [patent_no_of_words] => 12284 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/569/05569961.pdf [firstpage_image] =>[orig_patent_app_number] => 473050 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473050
Semiconductor device having a multi-layer metallization structure Jun 6, 1995 Issued
Array ( [id] => 3883105 [patent_doc_number] => 05764192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Wide field-of-view fixed body conformal antenna direction finding array' [patent_app_type] => 1 [patent_app_number] => 8/485202 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3490 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764192.pdf [firstpage_image] =>[orig_patent_app_number] => 485202 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/485202
Wide field-of-view fixed body conformal antenna direction finding array Jun 6, 1995 Issued
Array ( [id] => 3652619 [patent_doc_number] => 05684305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Pilot transistor for quasi-vertical DMOS device' [patent_app_type] => 1 [patent_app_number] => 8/483692 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2558 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684305.pdf [firstpage_image] =>[orig_patent_app_number] => 483692 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/483692
Pilot transistor for quasi-vertical DMOS device Jun 6, 1995 Issued
Array ( [id] => 3818006 [patent_doc_number] => 05710443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Merged device with aligned trench fet and buried emitter patterns' [patent_app_type] => 1 [patent_app_number] => 8/472337 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1856 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710443.pdf [firstpage_image] =>[orig_patent_app_number] => 472337 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472337
Merged device with aligned trench fet and buried emitter patterns Jun 6, 1995 Issued
08/483053 SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME AND SEMICONDUCTOR DEVICE UNIT AND METHOD OF PRODUCING THE SAME Jun 6, 1995 Abandoned
Array ( [id] => 3736450 [patent_doc_number] => 05666007 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Interconnect structures for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/487787 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 6931 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666007.pdf [firstpage_image] =>[orig_patent_app_number] => 487787 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/487787
Interconnect structures for integrated circuits Jun 6, 1995 Issued
08/485227 CUBIC SEMICONDUCTOR PACKAGE Jun 6, 1995 Abandoned
Array ( [id] => 3548514 [patent_doc_number] => 05554866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Pre-oxidizing high-dielectric-constant material electrodes' [patent_app_type] => 1 [patent_app_number] => 8/486120 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4179 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/554/05554866.pdf [firstpage_image] =>[orig_patent_app_number] => 486120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486120
Pre-oxidizing high-dielectric-constant material electrodes Jun 6, 1995 Issued
Array ( [id] => 3594878 [patent_doc_number] => 05567987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Semiconductor device having a multi-layer metallization structure' [patent_app_type] => 1 [patent_app_number] => 8/480975 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 30 [patent_no_of_words] => 12282 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/567/05567987.pdf [firstpage_image] =>[orig_patent_app_number] => 480975 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/480975
Semiconductor device having a multi-layer metallization structure Jun 6, 1995 Issued
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