
Darlington Ly
Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2962, 2914, 2917 |
| Total Applications | 4527 |
| Issued Applications | 4184 |
| Pending Applications | 73 |
| Abandoned Applications | 287 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17018612
[patent_doc_number] => 11088259
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-10
[patent_title] => Method of manufacturing an electronic component including multiple quantum dots
[patent_app_type] => utility
[patent_app_number] => 16/413652
[patent_app_country] => US
[patent_app_date] => 2019-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 85
[patent_no_of_words] => 5647
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413652
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413652 | Method of manufacturing an electronic component including multiple quantum dots | May 15, 2019 | Issued |
Array
(
[id] => 14785145
[patent_doc_number] => 20190267470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-29
[patent_title] => METHOD FOR MANUFACURING NITROGEN-FACE POLARITY GALLIUM NITRIDE EPITAXIAL STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/413636
[patent_app_country] => US
[patent_app_date] => 2019-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1856
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413636
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413636 | Method for manufacturing nitrogen-face polarity gallium nitride epitaxial structure | May 15, 2019 | Issued |
Array
(
[id] => 17454057
[patent_doc_number] => 11268911
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-08
[patent_title] => Boron-based capping layers for EUV optics
[patent_app_type] => utility
[patent_app_number] => 16/413740
[patent_app_country] => US
[patent_app_date] => 2019-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 8728
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413740
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413740 | Boron-based capping layers for EUV optics | May 15, 2019 | Issued |
Array
(
[id] => 15148597
[patent_doc_number] => 20190352776
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => Atomic Layer Self Aligned Substrate Processing And Integrated Toolset
[patent_app_type] => utility
[patent_app_number] => 16/412696
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7806
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412696
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/412696 | Atomic layer self aligned substrate processing and integrated toolset | May 14, 2019 | Issued |
Array
(
[id] => 16455964
[patent_doc_number] => 20200365390
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/413232
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3642
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413232
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413232 | Method for manufacturing a semiconductor structure | May 14, 2019 | Issued |
Array
(
[id] => 16456170
[patent_doc_number] => 20200365596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => SEMICONDUCTOR FORMATION USING HYBRID OXIDATION
[patent_app_type] => utility
[patent_app_number] => 16/413108
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6700
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413108
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413108 | Semiconductor formation using hybrid oxidation | May 14, 2019 | Issued |
Array
(
[id] => 15874193
[patent_doc_number] => 20200144500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/413491
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4125
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413491
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413491 | Method for manufacturing semiconductor device | May 14, 2019 | Issued |
Array
(
[id] => 16638103
[patent_doc_number] => 10916618
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-09
[patent_title] => Array substrate and method for repairing array substrate
[patent_app_type] => utility
[patent_app_number] => 16/413040
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 6253
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413040
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413040 | Array substrate and method for repairing array substrate | May 14, 2019 | Issued |
Array
(
[id] => 15154239
[patent_doc_number] => 20190355597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => METHOD OF PROCESSING SUBSTRATE AND SUBSTRATE PROCESSING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 16/412843
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9076
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412843
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/412843 | Method of processing substrate and substrate processing apparatus | May 14, 2019 | Issued |
Array
(
[id] => 15184859
[patent_doc_number] => 20190363021
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => SILICIDING METHOD
[patent_app_type] => utility
[patent_app_number] => 16/412959
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4026
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412959
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/412959 | SILICIDING METHOD | May 14, 2019 | Abandoned |
Array
(
[id] => 14785125
[patent_doc_number] => 20190267460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-29
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/406117
[patent_app_country] => US
[patent_app_date] => 2019-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12112
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406117
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/406117 | Semiconductor device | May 7, 2019 | Issued |
Array
(
[id] => 16687450
[patent_doc_number] => 20210069926
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => CRYSTAL CUTTING METHOD, METHOD OF MANUFACTURING SIC SEMICONDUCTOR DEVICE, AND SIC SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/041269
[patent_app_country] => US
[patent_app_date] => 2019-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 73494
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17041269
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/041269 | CRYSTAL CUTTING METHOD, METHOD OF MANUFACTURING SIC SEMICONDUCTOR DEVICE, AND SIC SEMICONDUCTOR DEVICE | Apr 25, 2019 | Abandoned |
Array
(
[id] => 14691497
[patent_doc_number] => 20190244864
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-08
[patent_title] => Semiconductor Device and Method
[patent_app_type] => utility
[patent_app_number] => 16/390516
[patent_app_country] => US
[patent_app_date] => 2019-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8611
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390516
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/390516 | Semiconductor device and method | Apr 21, 2019 | Issued |
Array
(
[id] => 14969021
[patent_doc_number] => 20190311989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => METHODS AND DEVICES FOR SOLDERLESS INTEGRATION OF MULTIPLE SEMICONDUCTOR DIES ON FLEXIBLE SUBSTRATES
[patent_app_type] => utility
[patent_app_number] => 16/380483
[patent_app_country] => US
[patent_app_date] => 2019-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7723
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380483
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/380483 | Methods and devices for solderless integration of multiple semiconductor dies on flexible substrates | Apr 9, 2019 | Issued |
Array
(
[id] => 16988254
[patent_doc_number] => 11075439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-27
[patent_title] => Electronic device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/379819
[patent_app_country] => US
[patent_app_date] => 2019-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 44
[patent_no_of_words] => 10408
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16379819
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/379819 | Electronic device and manufacturing method thereof | Apr 9, 2019 | Issued |
Array
(
[id] => 16605300
[patent_doc_number] => 10906288
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-02
[patent_title] => Method for manufacturing display device
[patent_app_type] => utility
[patent_app_number] => 16/377259
[patent_app_country] => US
[patent_app_date] => 2019-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3342
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16377259
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/377259 | Method for manufacturing display device | Apr 7, 2019 | Issued |
Array
(
[id] => 16364408
[patent_doc_number] => 20200321159
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-08
[patent_title] => METHOD AND A MECHANISM CAPABLE OF ANNEALING A GMR SENSOR
[patent_app_type] => utility
[patent_app_number] => 16/377245
[patent_app_country] => US
[patent_app_date] => 2019-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3780
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16377245
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/377245 | METHOD AND A MECHANISM CAPABLE OF ANNEALING A GMR SENSOR | Apr 6, 2019 | Abandoned |
Array
(
[id] => 14966161
[patent_doc_number] => 20190310559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => Method of Determining a Characteristic of a Structure, and Metrology Apparatus
[patent_app_type] => utility
[patent_app_number] => 16/376639
[patent_app_country] => US
[patent_app_date] => 2019-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14648
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16376639
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/376639 | Method of determining a characteristic of a structure, and metrology apparatus | Apr 4, 2019 | Issued |
Array
(
[id] => 16364705
[patent_doc_number] => 20200321456
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-08
[patent_title] => TWO-DIMENSIONAL ELECTRON GAS (2DEG)-CONFINED DEVICES AND METHODS
[patent_app_type] => utility
[patent_app_number] => 16/376468
[patent_app_country] => US
[patent_app_date] => 2019-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7936
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16376468
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/376468 | Two-dimensional electron gas (2DEG)-confined devices and methods | Apr 4, 2019 | Issued |
Array
(
[id] => 16601772
[patent_doc_number] => 20210028303
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-28
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/982210
[patent_app_country] => US
[patent_app_date] => 2019-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20988
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16982210
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/982210 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Mar 21, 2019 | Abandoned |