Darlington Ly

Array ( [id] => 10845393 [patent_doc_number] => 08872577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Semiconductor device and power supply unit utilizing the same' [patent_app_type] => utility [patent_app_number] => 14/191242 [patent_app_country] => US [patent_app_date] => 2014-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2691 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14191242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13257099 [patent_doc_number] => 10141244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => TSV layout structure and TSV interconnect structure, and fabrication methods thereof [patent_app_type] => utility [patent_app_number] => 14/181862 [patent_app_country] => US [patent_app_date] => 2014-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4299 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14181862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10343633 [patent_doc_number] => 20150228638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'Diode Circuit Layout Topology With Reduced Lateral Parasitic Bipolar Action' [patent_app_type] => utility [patent_app_number] => 14/177670 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5477 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10343644 [patent_doc_number] => 20150228649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'TRANSISTOR WITH WELL TAP IMPLANT' [patent_app_type] => utility [patent_app_number] => 14/176660 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10525722 [patent_doc_number] => 09252243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Gate structure integration scheme for fin field effect transistors' [patent_app_type] => utility [patent_app_number] => 14/175441 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 10193 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10332987 [patent_doc_number] => 20150217991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'MEMS DEVICE WITH SPLIT PAD PACKAGE' [patent_app_type] => utility [patent_app_number] => 14/170178 [patent_app_country] => US [patent_app_date] => 2014-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3086 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14170178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10329141 [patent_doc_number] => 20150214144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'NANOTUBE STRUCTURE BASED METAL DAMASCENE PROCESS' [patent_app_type] => utility [patent_app_number] => 14/168025 [patent_app_country] => US [patent_app_date] => 2014-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4352 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14168025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10079942 [patent_doc_number] => 09117796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Semiconductor arrangement and formation thereof' [patent_app_type] => utility [patent_app_number] => 14/166925 [patent_app_country] => US [patent_app_date] => 2014-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 5452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14166925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10325534 [patent_doc_number] => 20150210538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'MEMS PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/167819 [patent_app_country] => US [patent_app_date] => 2014-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2609 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14167819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10329145 [patent_doc_number] => 20150214149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'E-FUSE STRUCTURE WITH METHODS OF FUSING THE SAME AND MONITORING MATERIAL LEAKAGE' [patent_app_type] => utility [patent_app_number] => 14/165039 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4850 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14165039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10329362 [patent_doc_number] => 20150214367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/163302 [patent_app_country] => US [patent_app_date] => 2014-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9014 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14163302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10525600 [patent_doc_number] => 09252121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Thermal interface material on package' [patent_app_type] => utility [patent_app_number] => 14/162411 [patent_app_country] => US [patent_app_date] => 2014-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2898 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14162411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10311911 [patent_doc_number] => 20150196912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'METHOD OF MAKING FLOWCELL WITH MICRO-FLUID STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/156641 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14156641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9463443 [patent_doc_number] => 20140127870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 14/155972 [patent_app_country] => US [patent_app_date] => 2014-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14155972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9463461 [patent_doc_number] => 20140127888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 14/156006 [patent_app_country] => US [patent_app_date] => 2014-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4782 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14156006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10037036 [patent_doc_number] => 09078373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-07 [patent_title] => 'Integrated circuit structures having off-axis in-hole capacitor and methods of forming' [patent_app_type] => utility [patent_app_number] => 14/147225 [patent_app_country] => US [patent_app_date] => 2014-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4324 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14147225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10302753 [patent_doc_number] => 20150187753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'FIN CONTACTED ELECTROSTATIC DISCHARGE (ESD) DEVICES WITH IMPROVED HEAT DISTRIBUTION' [patent_app_type] => utility [patent_app_number] => 14/146421 [patent_app_country] => US [patent_app_date] => 2014-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14146421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9418778 [patent_doc_number] => 20140103428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'TRENCH SUPERJUNCTION MOSFET WITH THIN EPI PROCESS' [patent_app_type] => utility [patent_app_number] => 14/141340 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8794 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141340 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9338999 [patent_doc_number] => 20140065781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'Ultra-High Voltage N-Type-Metal-Oxide-Semiconductor (UHV NMOS) Device and Methods of Manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/071768 [patent_app_country] => US [patent_app_date] => 2013-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5933 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9334124 [patent_doc_number] => 20140060906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'LIGHT EMITTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/071526 [patent_app_country] => US [patent_app_date] => 2013-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10326 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071526 [rel_patent_id] =>[rel_patent_doc_number] =>)