Search

Darlington Ly

Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2962, 2914, 2917
Total Applications
4527
Issued Applications
4184
Pending Applications
73
Abandoned Applications
287

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5521547 [patent_doc_number] => 20090029528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'METHOD AND APPARATUS FOR CLEANING A SUBSTRATE SURFACE' [patent_app_type] => utility [patent_app_number] => 12/146177 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8283 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20090029528.pdf [firstpage_image] =>[orig_patent_app_number] => 12146177 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/146177
Method and apparatus for cleaning a substrate surface Jun 24, 2008 Issued
Array ( [id] => 6469705 [patent_doc_number] => 20100207090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'SOLID MEMORY' [patent_app_type] => utility [patent_app_number] => 12/733295 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1916 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20100207090.pdf [firstpage_image] =>[orig_patent_app_number] => 12733295 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/733295
SOLID MEMORY Jun 12, 2008 Abandoned
Array ( [id] => 6493664 [patent_doc_number] => 20100200828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'SOLID MEMORY' [patent_app_type] => utility [patent_app_number] => 12/733296 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1725 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200828.pdf [firstpage_image] =>[orig_patent_app_number] => 12733296 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/733296
SOLID MEMORY Jun 12, 2008 Abandoned
Array ( [id] => 5521519 [patent_doc_number] => 20090029500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'HERMETIC PACAKGING AND METHOD OF MANUFACTURE AND USE THEREFORE' [patent_app_type] => utility [patent_app_number] => 12/101957 [patent_app_country] => US [patent_app_date] => 2008-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 2924 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20090029500.pdf [firstpage_image] =>[orig_patent_app_number] => 12101957 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/101957
HERMETIC PACAKGING AND METHOD OF MANUFACTURE AND USE THEREFORE Jun 7, 2008 Abandoned
Array ( [id] => 10844405 [patent_doc_number] => 08871581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Enhancement mode III-nitride FET' [patent_app_type] => utility [patent_app_number] => 12/116366 [patent_app_country] => US [patent_app_date] => 2008-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4984 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12116366 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/116366
Enhancement mode III-nitride FET May 6, 2008 Issued
Array ( [id] => 4676298 [patent_doc_number] => 20080213928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/115906 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10795 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20080213928.pdf [firstpage_image] =>[orig_patent_app_number] => 12115906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/115906
Method for manufacturing semiconductor light emitting device May 5, 2008 Issued
Array ( [id] => 8270241 [patent_doc_number] => 08211743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Methods of forming non-volatile memory cells having multi-resistive state material between conductive electrodes' [patent_app_type] => utility [patent_app_number] => 12/114096 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5500 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12114096 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/114096
Methods of forming non-volatile memory cells having multi-resistive state material between conductive electrodes May 1, 2008 Issued
Array ( [id] => 4719490 [patent_doc_number] => 20080242013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/113467 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 22228 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242013.pdf [firstpage_image] =>[orig_patent_app_number] => 12113467 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/113467
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME Apr 30, 2008 Abandoned
Array ( [id] => 4727411 [patent_doc_number] => 20080206955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'Method of Forming an Isolation Film in a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/112725 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2511 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20080206955.pdf [firstpage_image] =>[orig_patent_app_number] => 12112725 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/112725
Method of Forming an Isolation Film in a Semiconductor Device Apr 29, 2008 Abandoned
Array ( [id] => 5558320 [patent_doc_number] => 20090269897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'METHODS OF FABRICATING DUAL-DEPTH TRENCH ISOLATION REGIONS FOR A MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 12/111266 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4468 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20090269897.pdf [firstpage_image] =>[orig_patent_app_number] => 12111266 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111266
METHODS OF FABRICATING DUAL-DEPTH TRENCH ISOLATION REGIONS FOR A MEMORY CELL Apr 28, 2008 Abandoned
Array ( [id] => 5555579 [patent_doc_number] => 20090267156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'DEVICE STRUCTURES INCLUDING DUAL-DEPTH TRENCH ISOLATION REGIONS AND DESIGN STRUCTURES FOR A STATIC RANDOM ACCESS MEMORY' [patent_app_type] => utility [patent_app_number] => 12/111285 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4538 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20090267156.pdf [firstpage_image] =>[orig_patent_app_number] => 12111285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111285
DEVICE STRUCTURES INCLUDING DUAL-DEPTH TRENCH ISOLATION REGIONS AND DESIGN STRUCTURES FOR A STATIC RANDOM ACCESS MEMORY Apr 28, 2008 Abandoned
Array ( [id] => 8835076 [patent_doc_number] => 08450835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Reverse leakage reduction and vertical height shrinking of diode with halo doping' [patent_app_type] => utility [patent_app_number] => 12/149217 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2626 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12149217 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/149217
Reverse leakage reduction and vertical height shrinking of diode with halo doping Apr 28, 2008 Issued
Array ( [id] => 4539457 [patent_doc_number] => 07875550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Method and structure for self-aligned device contacts' [patent_app_type] => utility [patent_app_number] => 12/110465 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5037 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/875/07875550.pdf [firstpage_image] =>[orig_patent_app_number] => 12110465 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/110465
Method and structure for self-aligned device contacts Apr 27, 2008 Issued
Array ( [id] => 112432 [patent_doc_number] => 07713863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Method for manufacturing a semiconductor device and method for etching the same' [patent_app_type] => utility [patent_app_number] => 12/110479 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 8394 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/713/07713863.pdf [firstpage_image] =>[orig_patent_app_number] => 12110479 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/110479
Method for manufacturing a semiconductor device and method for etching the same Apr 27, 2008 Issued
Array ( [id] => 4822153 [patent_doc_number] => 20080227282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'METHOD OF MANUFACTURING NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/107775 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8669 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20080227282.pdf [firstpage_image] =>[orig_patent_app_number] => 12107775 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107775
METHOD OF MANUFACTURING NON-VOLATILE MEMORY Apr 22, 2008 Abandoned
Array ( [id] => 4629871 [patent_doc_number] => 08008769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Heat-dissipating semiconductor package structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/150047 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3106 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/008/08008769.pdf [firstpage_image] =>[orig_patent_app_number] => 12150047 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/150047
Heat-dissipating semiconductor package structure and method for manufacturing the same Apr 22, 2008 Issued
Array ( [id] => 5456090 [patent_doc_number] => 20090256242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'METHOD OF FORMING AN ELECTRONIC DEVICE INCLUDING FORMING A CHARGE STORAGE ELEMENT IN A TRENCH OF A WORKPIECE' [patent_app_type] => utility [patent_app_number] => 12/102488 [patent_app_country] => US [patent_app_date] => 2008-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20090256242.pdf [firstpage_image] =>[orig_patent_app_number] => 12102488 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/102488
Method of forming an electronic device including forming a charge storage element in a trench of a workpiece Apr 13, 2008 Issued
Array ( [id] => 8802240 [patent_doc_number] => 08440514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/101725 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5969 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12101725 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/101725
Semiconductor device and method for manufacturing the same Apr 10, 2008 Issued
Array ( [id] => 4608815 [patent_doc_number] => 07993998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'CMOS devices having dual high-mobility channels' [patent_app_type] => utility [patent_app_number] => 12/043588 [patent_app_country] => US [patent_app_date] => 2008-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3219 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/993/07993998.pdf [firstpage_image] =>[orig_patent_app_number] => 12043588 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/043588
CMOS devices having dual high-mobility channels Mar 5, 2008 Issued
Array ( [id] => 4765156 [patent_doc_number] => 20080176367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'Field effect transistor and fabrication thereof, semiconductor device and fabrication thereof, logic circuit including the semiconductor device, and semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 12/071085 [patent_app_country] => US [patent_app_date] => 2008-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10487 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20080176367.pdf [firstpage_image] =>[orig_patent_app_number] => 12071085 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/071085
Method of forming N-and P- channel field effect transistors on the same silicon layer having a strain effect Feb 14, 2008 Issued
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