Search

Darlington Ly

Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2962, 2914, 2917
Total Applications
4527
Issued Applications
4184
Pending Applications
73
Abandoned Applications
287

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 184941 [patent_doc_number] => 07648876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Flash memory device' [patent_app_type] => utility [patent_app_number] => 11/849744 [patent_app_country] => US [patent_app_date] => 2007-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1403 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/648/07648876.pdf [firstpage_image] =>[orig_patent_app_number] => 11849744 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/849744
Flash memory device Sep 3, 2007 Issued
Array ( [id] => 6298239 [patent_doc_number] => 20100067224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'LIGHT EMITTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/312533 [patent_app_country] => US [patent_app_date] => 2007-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10418 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20100067224.pdf [firstpage_image] =>[orig_patent_app_number] => 12312533 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/312533
LIGHT EMITTING SYSTEM Aug 23, 2007 Abandoned
Array ( [id] => 4909778 [patent_doc_number] => 20080020544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'Method for Forming Wall Oxide Layer and Isolation Layer in Flash Memory Device' [patent_app_type] => utility [patent_app_number] => 11/833056 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3148 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20080020544.pdf [firstpage_image] =>[orig_patent_app_number] => 11833056 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/833056
Method for Forming Wall Oxide Layer and Isolation Layer in Flash Memory Device Aug 1, 2007 Abandoned
Array ( [id] => 5046138 [patent_doc_number] => 20070264811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'METHOD FOR FORMING SALICIDE IN SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/782073 [patent_app_country] => US [patent_app_date] => 2007-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3447 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20070264811.pdf [firstpage_image] =>[orig_patent_app_number] => 11782073 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/782073
Method for forming salicide in semiconductor device Jul 23, 2007 Issued
Array ( [id] => 5016288 [patent_doc_number] => 20070259497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'FABRICATING METHOD OF NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/778655 [patent_app_country] => US [patent_app_date] => 2007-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7105 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20070259497.pdf [firstpage_image] =>[orig_patent_app_number] => 11778655 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/778655
Fabricating method of non-volatile memory Jul 16, 2007 Issued
Array ( [id] => 4825936 [patent_doc_number] => 20080124879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Method for Fabricating Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 11/773216 [patent_app_country] => US [patent_app_date] => 2007-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1914 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20080124879.pdf [firstpage_image] =>[orig_patent_app_number] => 11773216 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/773216
Method for Fabricating Semiconductor Device Jul 2, 2007 Abandoned
Array ( [id] => 285423 [patent_doc_number] => 07550350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Methods of forming flash memory device' [patent_app_type] => utility [patent_app_number] => 11/770995 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 1967 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550350.pdf [firstpage_image] =>[orig_patent_app_number] => 11770995 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770995
Methods of forming flash memory device Jun 28, 2007 Issued
Array ( [id] => 4551618 [patent_doc_number] => 07820514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Methods of forming flash memory devices including blocking oxide films' [patent_app_type] => utility [patent_app_number] => 11/756427 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3225 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/820/07820514.pdf [firstpage_image] =>[orig_patent_app_number] => 11756427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/756427
Methods of forming flash memory devices including blocking oxide films May 30, 2007 Issued
Array ( [id] => 5082916 [patent_doc_number] => 20070272967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Method for Modulating the Effective Work Function' [patent_app_type] => utility [patent_app_number] => 11/754775 [patent_app_country] => US [patent_app_date] => 2007-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4798 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20070272967.pdf [firstpage_image] =>[orig_patent_app_number] => 11754775 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754775
Method for Modulating the Effective Work Function May 28, 2007 Abandoned
Array ( [id] => 4451135 [patent_doc_number] => 07964458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Method for forming a strained transistor by stress memorization based on a stressed implantation mask' [patent_app_type] => utility [patent_app_number] => 11/746106 [patent_app_country] => US [patent_app_date] => 2007-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 9338 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/964/07964458.pdf [firstpage_image] =>[orig_patent_app_number] => 11746106 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746106
Method for forming a strained transistor by stress memorization based on a stressed implantation mask May 8, 2007 Issued
Array ( [id] => 4960169 [patent_doc_number] => 20080274594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Step height reduction between SOI and EPI for DSO and BOS integration' [patent_app_type] => utility [patent_app_number] => 11/742755 [patent_app_country] => US [patent_app_date] => 2007-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9100 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20080274594.pdf [firstpage_image] =>[orig_patent_app_number] => 11742755 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/742755
Step height reduction between SOI and EPI for DSO and BOS integration Apr 30, 2007 Issued
Array ( [id] => 4883893 [patent_doc_number] => 20080258225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'MOS TRANSISTORS HAVING HIGH-K OFFSET SPACERS THAT REDUCE EXTERNAL RESISTANCE AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/738135 [patent_app_country] => US [patent_app_date] => 2007-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258225.pdf [firstpage_image] =>[orig_patent_app_number] => 11738135 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738135
MOS TRANSISTORS HAVING HIGH-K OFFSET SPACERS THAT REDUCE EXTERNAL RESISTANCE AND METHODS FOR FABRICATING THE SAME Apr 19, 2007 Abandoned
Array ( [id] => 4477069 [patent_doc_number] => 07868380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Fin FET and method of fabricating same' [patent_app_type] => utility [patent_app_number] => 11/733704 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 3560 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/868/07868380.pdf [firstpage_image] =>[orig_patent_app_number] => 11733704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733704
Fin FET and method of fabricating same Apr 9, 2007 Issued
Array ( [id] => 4925150 [patent_doc_number] => 20080164513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF FABRICATING A NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/693716 [patent_app_country] => US [patent_app_date] => 2007-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2065 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164513.pdf [firstpage_image] =>[orig_patent_app_number] => 11693716 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/693716
Method of fabricating a non-volatile semiconductor memory device Mar 29, 2007 Issued
Array ( [id] => 4719515 [patent_doc_number] => 20080242038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METHODS OF FORMING A MULTILAYER CAPPING FILM TO MINIMIZE DIFFERENTIAL HEATING IN ANNEAL PROCESSES' [patent_app_type] => utility [patent_app_number] => 11/692366 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1700 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242038.pdf [firstpage_image] =>[orig_patent_app_number] => 11692366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/692366
Methods of forming a multilayer capping film to minimize differential heating in anneal processes Mar 27, 2007 Issued
Array ( [id] => 404641 [patent_doc_number] => 07288470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-30 [patent_title] => 'Semiconductor device comprising buried channel region and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/727735 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 45 [patent_no_of_words] => 11095 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/288/07288470.pdf [firstpage_image] =>[orig_patent_app_number] => 11727735 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/727735
Semiconductor device comprising buried channel region and method for manufacturing the same Mar 27, 2007 Issued
Array ( [id] => 186068 [patent_doc_number] => 07646101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/729765 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3999 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/646/07646101.pdf [firstpage_image] =>[orig_patent_app_number] => 11729765 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/729765
Semiconductor device and manufacturing method thereof Mar 27, 2007 Issued
Array ( [id] => 4719497 [patent_doc_number] => 20080242020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METHOD OF MANUFACTURING A MOS TRANSISTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/692912 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4651 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242020.pdf [firstpage_image] =>[orig_patent_app_number] => 11692912 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/692912
METHOD OF MANUFACTURING A MOS TRANSISTOR DEVICE Mar 27, 2007 Abandoned
Array ( [id] => 5165667 [patent_doc_number] => 20070287254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/727536 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4838 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20070287254.pdf [firstpage_image] =>[orig_patent_app_number] => 11727536 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/727536
Method of manufacturing semiconductor device Mar 26, 2007 Issued
Array ( [id] => 4546650 [patent_doc_number] => 07960234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Multiple-gate MOSFET device and associated manufacturing methods' [patent_app_type] => utility [patent_app_number] => 11/726516 [patent_app_country] => US [patent_app_date] => 2007-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3147 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/960/07960234.pdf [firstpage_image] =>[orig_patent_app_number] => 11726516 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/726516
Multiple-gate MOSFET device and associated manufacturing methods Mar 21, 2007 Issued
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