
Darlington Ly
Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2962, 2914, 2917 |
| Total Applications | 4527 |
| Issued Applications | 4184 |
| Pending Applications | 73 |
| Abandoned Applications | 287 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5730283
[patent_doc_number] => 20060255397
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'Ultra high density flash memory'
[patent_app_type] => utility
[patent_app_number] => 11/490674
[patent_app_country] => US
[patent_app_date] => 2006-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7053
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20060255397.pdf
[firstpage_image] =>[orig_patent_app_number] => 11490674
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/490674 | Ultra high density flash memory | Jul 20, 2006 | Abandoned |
Array
(
[id] => 5732979
[patent_doc_number] => 20060258096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'Ultra high density flash memory'
[patent_app_type] => utility
[patent_app_number] => 11/491328
[patent_app_country] => US
[patent_app_date] => 2006-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7053
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20060258096.pdf
[firstpage_image] =>[orig_patent_app_number] => 11491328
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/491328 | Ultra high density flash memory | Jul 20, 2006 | Abandoned |
Array
(
[id] => 267447
[patent_doc_number] => 07566973
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-28
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/489625
[patent_app_country] => US
[patent_app_date] => 2006-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 6336
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/566/07566973.pdf
[firstpage_image] =>[orig_patent_app_number] => 11489625
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/489625 | Semiconductor device and method of manufacturing the same | Jul 19, 2006 | Issued |
Array
(
[id] => 5732990
[patent_doc_number] => 20060258107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines'
[patent_app_type] => utility
[patent_app_number] => 11/489381
[patent_app_country] => US
[patent_app_date] => 2006-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3721
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20060258107.pdf
[firstpage_image] =>[orig_patent_app_number] => 11489381
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/489381 | Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines | Jul 18, 2006 | Abandoned |
Array
(
[id] => 121610
[patent_doc_number] => 07709392
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-04
[patent_title] => 'Low K dielectric surface damage control'
[patent_app_type] => utility
[patent_app_number] => 11/457888
[patent_app_country] => US
[patent_app_date] => 2006-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1254
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/709/07709392.pdf
[firstpage_image] =>[orig_patent_app_number] => 11457888
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/457888 | Low K dielectric surface damage control | Jul 16, 2006 | Issued |
Array
(
[id] => 386597
[patent_doc_number] => 07303966
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-12-04
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/485895
[patent_app_country] => US
[patent_app_date] => 2006-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 3388
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/303/07303966.pdf
[firstpage_image] =>[orig_patent_app_number] => 11485895
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/485895 | Semiconductor device and method of manufacturing the same | Jul 12, 2006 | Issued |
Array
(
[id] => 4624201
[patent_doc_number] => 08003497
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-23
[patent_title] => 'Diluted magnetic semiconductor nanowires exhibiting magnetoresistance'
[patent_app_type] => utility
[patent_app_number] => 11/480280
[patent_app_country] => US
[patent_app_date] => 2006-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 37
[patent_no_of_words] => 6933
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/003/08003497.pdf
[firstpage_image] =>[orig_patent_app_number] => 11480280
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/480280 | Diluted magnetic semiconductor nanowires exhibiting magnetoresistance | Jun 28, 2006 | Issued |
Array
(
[id] => 5834844
[patent_doc_number] => 20060246675
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Methods of forming capacitor constructions comprising perovskite-type dielectric materials'
[patent_app_type] => utility
[patent_app_number] => 11/450787
[patent_app_country] => US
[patent_app_date] => 2006-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3384
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0246/20060246675.pdf
[firstpage_image] =>[orig_patent_app_number] => 11450787
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/450787 | Methods of forming capacitor constructions comprising perovskite-type dielectric materials | Jun 7, 2006 | Abandoned |
Array
(
[id] => 5685927
[patent_doc_number] => 20060284242
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-21
[patent_title] => 'Non-volatile memory device having floating gate and methods forming the same'
[patent_app_type] => utility
[patent_app_number] => 11/449036
[patent_app_country] => US
[patent_app_date] => 2006-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5815
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0284/20060284242.pdf
[firstpage_image] =>[orig_patent_app_number] => 11449036
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/449036 | Non-volatile memory device having floating gate and methods forming the same | Jun 6, 2006 | Abandoned |
Array
(
[id] => 173788
[patent_doc_number] => 07659167
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-09
[patent_title] => 'Method for improving the performance of flash memory by using microcrystalline silicon film as a floating gate'
[patent_app_type] => utility
[patent_app_number] => 11/422059
[patent_app_country] => US
[patent_app_date] => 2006-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 2923
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/659/07659167.pdf
[firstpage_image] =>[orig_patent_app_number] => 11422059
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/422059 | Method for improving the performance of flash memory by using microcrystalline silicon film as a floating gate | Jun 1, 2006 | Issued |
Array
(
[id] => 872141
[patent_doc_number] => 07361579
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-22
[patent_title] => 'Method for selective chemical vapor deposition of nanotubes'
[patent_app_type] => utility
[patent_app_number] => 11/419058
[patent_app_country] => US
[patent_app_date] => 2006-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 6
[patent_no_of_words] => 2223
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/361/07361579.pdf
[firstpage_image] =>[orig_patent_app_number] => 11419058
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/419058 | Method for selective chemical vapor deposition of nanotubes | May 17, 2006 | Issued |
Array
(
[id] => 5785593
[patent_doc_number] => 20060205154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-14
[patent_title] => 'MANUFACTURING METHOD OF AN NON-VOLATILE MEMORY STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 11/308796
[patent_app_country] => US
[patent_app_date] => 2006-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4157
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20060205154.pdf
[firstpage_image] =>[orig_patent_app_number] => 11308796
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/308796 | MANUFACTURING METHOD OF AN NON-VOLATILE MEMORY STRUCTURE | May 4, 2006 | Abandoned |
Array
(
[id] => 5482803
[patent_doc_number] => 20090272568
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-05
[patent_title] => 'Microwave Chip Supporting Structure'
[patent_app_type] => utility
[patent_app_number] => 12/298455
[patent_app_country] => US
[patent_app_date] => 2006-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3627
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0272/20090272568.pdf
[firstpage_image] =>[orig_patent_app_number] => 12298455
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/298455 | Microwave Chip Supporting Structure | Apr 27, 2006 | Abandoned |
Array
(
[id] => 151635
[patent_doc_number] => 07678623
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-16
[patent_title] => 'Staggered source/drain and thin-channel TFT structure and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/410168
[patent_app_country] => US
[patent_app_date] => 2006-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2941
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/678/07678623.pdf
[firstpage_image] =>[orig_patent_app_number] => 11410168
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/410168 | Staggered source/drain and thin-channel TFT structure and fabrication method thereof | Apr 23, 2006 | Issued |
Array
(
[id] => 5922717
[patent_doc_number] => 20060240584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-26
[patent_title] => 'Method of producing nitride-based semiconductor device, and light-emitting device produced thereby'
[patent_app_type] => utility
[patent_app_number] => 11/408689
[patent_app_country] => US
[patent_app_date] => 2006-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5531
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0240/20060240584.pdf
[firstpage_image] =>[orig_patent_app_number] => 11408689
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/408689 | Method of producing nitride-based semiconductor device, and light-emitting device produced thereby | Apr 19, 2006 | Issued |
Array
(
[id] => 359603
[patent_doc_number] => 07485482
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-03
[patent_title] => 'Method for manufacturing vertical group III-nitride light emitting device'
[patent_app_type] => utility
[patent_app_number] => 11/401329
[patent_app_country] => US
[patent_app_date] => 2006-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 4996
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/485/07485482.pdf
[firstpage_image] =>[orig_patent_app_number] => 11401329
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/401329 | Method for manufacturing vertical group III-nitride light emitting device | Apr 10, 2006 | Issued |
Array
(
[id] => 5919448
[patent_doc_number] => 20060239037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-26
[patent_title] => 'Method for manufacture of transparent devices having light emitting diodes (LED)'
[patent_app_type] => utility
[patent_app_number] => 11/398358
[patent_app_country] => US
[patent_app_date] => 2006-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2611
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0239/20060239037.pdf
[firstpage_image] =>[orig_patent_app_number] => 11398358
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/398358 | Method for manufacture of transparent devices having light emitting diodes (LED) | Apr 4, 2006 | Issued |
Array
(
[id] => 5256817
[patent_doc_number] => 20070210449
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Memory device and an array of conductive lines and methods of making the same'
[patent_app_type] => utility
[patent_app_number] => 11/369013
[patent_app_country] => US
[patent_app_date] => 2006-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 6345
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20070210449.pdf
[firstpage_image] =>[orig_patent_app_number] => 11369013
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/369013 | Memory device and an array of conductive lines and methods of making the same | Mar 6, 2006 | Abandoned |
Array
(
[id] => 5602438
[patent_doc_number] => 20060292783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-28
[patent_title] => 'CMOS transistor and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/363176
[patent_app_country] => US
[patent_app_date] => 2006-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5390
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0292/20060292783.pdf
[firstpage_image] =>[orig_patent_app_number] => 11363176
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/363176 | CMOS transistor and method of manufacturing the same | Feb 27, 2006 | Issued |
Array
(
[id] => 170548
[patent_doc_number] => 07662684
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-16
[patent_title] => 'Method for reducing poly-depletion in dual gate CMOS fabrication process'
[patent_app_type] => utility
[patent_app_number] => 11/364484
[patent_app_country] => US
[patent_app_date] => 2006-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 3979
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/662/07662684.pdf
[firstpage_image] =>[orig_patent_app_number] => 11364484
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/364484 | Method for reducing poly-depletion in dual gate CMOS fabrication process | Feb 27, 2006 | Issued |