Search

Darlington Ly

Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2962, 2914, 2917
Total Applications
4527
Issued Applications
4184
Pending Applications
73
Abandoned Applications
287

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1012651 [patent_doc_number] => 06897122 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'Wide neck shallow trench isolation region to prevent strain relaxation at shallow trench isolation region edges' [patent_app_type] => utility [patent_app_number] => 10/747205 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 3432 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897122.pdf [firstpage_image] =>[orig_patent_app_number] => 10747205 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/747205
Wide neck shallow trench isolation region to prevent strain relaxation at shallow trench isolation region edges Dec 29, 2003 Issued
Array ( [id] => 7609885 [patent_doc_number] => 06998302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Method of manufacturing mosfet having a fine gate width with improvement of short channel effect' [patent_app_type] => utility [patent_app_number] => 10/748466 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1095 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998302.pdf [firstpage_image] =>[orig_patent_app_number] => 10748466 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748466
Method of manufacturing mosfet having a fine gate width with improvement of short channel effect Dec 29, 2003 Issued
Array ( [id] => 7184139 [patent_doc_number] => 20040203201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Method for fabricating capacitor of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/749775 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6199 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20040203201.pdf [firstpage_image] =>[orig_patent_app_number] => 10749775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/749775
Method for fabricating capacitor of semiconductor device Dec 29, 2003 Issued
Array ( [id] => 7309216 [patent_doc_number] => 20040142521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'METHODS FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => new [patent_app_number] => 10/747595 [patent_app_country] => US [patent_app_date] => 2003-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1564 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142521.pdf [firstpage_image] =>[orig_patent_app_number] => 10747595 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/747595
Methods for manufacturing a semiconductor device Dec 28, 2003 Issued
Array ( [id] => 885888 [patent_doc_number] => 07352069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Electronic component unit' [patent_app_type] => utility [patent_app_number] => 10/540863 [patent_app_country] => US [patent_app_date] => 2003-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 9118 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/352/07352069.pdf [firstpage_image] =>[orig_patent_app_number] => 10540863 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/540863
Electronic component unit Dec 23, 2003 Issued
Array ( [id] => 817043 [patent_doc_number] => 07410851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Low voltage superjunction MOSFET' [patent_app_type] => utility [patent_app_number] => 10/746334 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2569 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/410/07410851.pdf [firstpage_image] =>[orig_patent_app_number] => 10746334 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/746334
Low voltage superjunction MOSFET Dec 22, 2003 Issued
Array ( [id] => 7104087 [patent_doc_number] => 20050106813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Method of manufacturing flash memory device' [patent_app_type] => utility [patent_app_number] => 10/745165 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2928 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106813.pdf [firstpage_image] =>[orig_patent_app_number] => 10745165 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/745165
Method of manufacturing flash memory device Dec 22, 2003 Abandoned
Array ( [id] => 7125129 [patent_doc_number] => 20050056873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'DRAM memory with vertically arranged selection transistors' [patent_app_type] => utility [patent_app_number] => 10/744056 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7262 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20050056873.pdf [firstpage_image] =>[orig_patent_app_number] => 10744056 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/744056
DRAM memory with vertically arranged selection transistors Dec 22, 2003 Issued
Array ( [id] => 7335525 [patent_doc_number] => 20040132269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Method for selective chemical vapor deposition of nanotubes' [patent_app_type] => new [patent_app_number] => 10/740295 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2198 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20040132269.pdf [firstpage_image] =>[orig_patent_app_number] => 10740295 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/740295
Method for selective chemical vapor deposition of nanotubes Dec 17, 2003 Issued
Array ( [id] => 435847 [patent_doc_number] => 07262103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Method for forming a salicide in semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/740136 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3450 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/262/07262103.pdf [firstpage_image] =>[orig_patent_app_number] => 10740136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/740136
Method for forming a salicide in semiconductor device Dec 17, 2003 Issued
Array ( [id] => 7335398 [patent_doc_number] => 20040132239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Methods to form dual metal gates by incorporating metals and their conductive oxides' [patent_app_type] => new [patent_app_number] => 10/736943 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3668 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20040132239.pdf [firstpage_image] =>[orig_patent_app_number] => 10736943 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/736943
Methods to form dual metal gates by incorporating metals and their conductive oxides Dec 15, 2003 Issued
Array ( [id] => 7428911 [patent_doc_number] => 20040266030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method for fabricating ferroelectric random access memory device having capacitor with merged top-electrode and plate-line structure' [patent_app_type] => new [patent_app_number] => 10/734865 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3283 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266030.pdf [firstpage_image] =>[orig_patent_app_number] => 10734865 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/734865
Method for fabricating ferroelectric random access memory device having capacitor with merged top-electrode and plate-line structure Dec 11, 2003 Abandoned
Array ( [id] => 7428907 [patent_doc_number] => 20040266029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method for manufacturing ferroelectric random access memory capacitor' [patent_app_type] => new [patent_app_number] => 10/730966 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3053 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266029.pdf [firstpage_image] =>[orig_patent_app_number] => 10730966 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/730966
Method for manufacturing ferroelectric random access memory capacitor Dec 7, 2003 Issued
Array ( [id] => 530831 [patent_doc_number] => 07179720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Pre-fabrication scribing' [patent_app_type] => utility [patent_app_number] => 10/729176 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 1314 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/179/07179720.pdf [firstpage_image] =>[orig_patent_app_number] => 10729176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/729176
Pre-fabrication scribing Dec 3, 2003 Issued
Array ( [id] => 7429474 [patent_doc_number] => 20040266105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Selfaligned process for a flash memory' [patent_app_type] => new [patent_app_number] => 10/725556 [patent_app_country] => US [patent_app_date] => 2003-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1659 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266105.pdf [firstpage_image] =>[orig_patent_app_number] => 10725556 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/725556
Process for a flash memory with high breakdown resistance between gate and contact Dec 2, 2003 Issued
Array ( [id] => 1071844 [patent_doc_number] => 06841428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Method for fabricating thin film transistor liquid crystal display' [patent_app_type] => utility [patent_app_number] => 10/722275 [patent_app_country] => US [patent_app_date] => 2003-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1971 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841428.pdf [firstpage_image] =>[orig_patent_app_number] => 10722275 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/722275
Method for fabricating thin film transistor liquid crystal display Nov 24, 2003 Issued
Array ( [id] => 7471505 [patent_doc_number] => 20040121552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Method of forming trench in semiconductor device' [patent_app_type] => new [patent_app_number] => 10/722295 [patent_app_country] => US [patent_app_date] => 2003-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2414 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121552.pdf [firstpage_image] =>[orig_patent_app_number] => 10722295 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/722295
Method of forming trench in semiconductor device using polish stop layer and anti-reflection coating Nov 24, 2003 Issued
Array ( [id] => 641763 [patent_doc_number] => 07122462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Back end interconnect with a shaped interface' [patent_app_type] => utility [patent_app_number] => 10/707122 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2867 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/122/07122462.pdf [firstpage_image] =>[orig_patent_app_number] => 10707122 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707122
Back end interconnect with a shaped interface Nov 20, 2003 Issued
Array ( [id] => 7452003 [patent_doc_number] => 20040099964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Use of hafnium silicon oxynitride as the cap layer of the sidewall spacer' [patent_app_type] => new [patent_app_number] => 10/719280 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 765 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099964.pdf [firstpage_image] =>[orig_patent_app_number] => 10719280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/719280
Use of hafnium silicon oxynitride as the cap layer of the sidewall spacer Nov 20, 2003 Abandoned
Array ( [id] => 7675210 [patent_doc_number] => 20040126908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => '[ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE DISPLAY AND FABRICATING METHOD THEREOF]' [patent_app_type] => new [patent_app_number] => 10/707111 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1888 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20040126908.pdf [firstpage_image] =>[orig_patent_app_number] => 10707111 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707111
[ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE DISPLAY AND FABRICATING METHOD THEREOF] Nov 20, 2003 Abandoned
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