Darlington Ly

Array ( [id] => 7301229 [patent_doc_number] => 20040113206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Use of hafnium silicon oxynitride as the cap layer of the sidewall spacer' [patent_app_type] => new [patent_app_number] => 10/719279 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 765 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113206.pdf [firstpage_image] =>[orig_patent_app_number] => 10719279 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7286410 [patent_doc_number] => 20040108538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Nonvolatile semiconductor memory device and its manufacturing method' [patent_app_type] => new [patent_app_number] => 10/716556 [patent_app_country] => US [patent_app_date] => 2003-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 4917 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20040108538.pdf [firstpage_image] =>[orig_patent_app_number] => 10716556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1107673 [patent_doc_number] => 06808991 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-26 [patent_title] => 'Method for forming twin bit cell flash memory' [patent_app_type] => B1 [patent_app_number] => 10/717155 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1715 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/808/06808991.pdf [firstpage_image] =>[orig_patent_app_number] => 10717155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 951301 [patent_doc_number] => 06960503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Method for fabricating a trench capacitor' [patent_app_type] => utility [patent_app_number] => 10/707026 [patent_app_country] => US [patent_app_date] => 2003-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2644 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/960/06960503.pdf [firstpage_image] =>[orig_patent_app_number] => 10707026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 871981 [patent_doc_number] => 07361525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Semiconductor integrated device having solid-state image sensor packaged within and production method for same' [patent_app_type] => utility [patent_app_number] => 10/530095 [patent_app_country] => US [patent_app_date] => 2003-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 3913 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/361/07361525.pdf [firstpage_image] =>[orig_patent_app_number] => 10530095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 698881 [patent_doc_number] => 07067367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-27 [patent_title] => 'Method for reducing poly-depletion due to thickness variation in a polysilicon layer in dual gate CMOS fabrication process' [patent_app_type] => utility [patent_app_number] => 10/712921 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4049 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/067/07067367.pdf [firstpage_image] =>[orig_patent_app_number] => 10712921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7471634 [patent_doc_number] => 20040121578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Method of forming a dual damascene pattern in a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/704966 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121578.pdf [firstpage_image] =>[orig_patent_app_number] => 10704966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 478263 [patent_doc_number] => 07223618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-29 [patent_title] => 'Fabrication of laser diode array' [patent_app_type] => utility [patent_app_number] => 10/706706 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 969 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/223/07223618.pdf [firstpage_image] =>[orig_patent_app_number] => 10706706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7089210 [patent_doc_number] => 20050009323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method for forming metal wiring of semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/704895 [patent_app_country] => US [patent_app_date] => 2003-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2447 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009323.pdf [firstpage_image] =>[orig_patent_app_number] => 10704895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6918308 [patent_doc_number] => 20050095869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Low K dielectric surface damage control' [patent_app_type] => utility [patent_app_number] => 10/701825 [patent_app_country] => US [patent_app_date] => 2003-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1121 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20050095869.pdf [firstpage_image] =>[orig_patent_app_number] => 10701825 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7189760 [patent_doc_number] => 20040084738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Flip-chip assembly of protected micromechanical devices' [patent_app_type] => new [patent_app_number] => 10/695026 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5459 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20040084738.pdf [firstpage_image] =>[orig_patent_app_number] => 10695026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7472018 [patent_doc_number] => 20040097036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Method for fabricating a vertical NROM cell' [patent_app_type] => new [patent_app_number] => 10/694155 [patent_app_country] => US [patent_app_date] => 2003-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2198 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20040097036.pdf [firstpage_image] =>[orig_patent_app_number] => 10694155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 682513 [patent_doc_number] => 07081402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Semiconductor package substrate having contact pad protective layer formed thereon and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/695356 [patent_app_country] => US [patent_app_date] => 2003-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 5132 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/081/07081402.pdf [firstpage_image] =>[orig_patent_app_number] => 10695356 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7301235 [patent_doc_number] => 20040113212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'MOS transistors having inverted T-shaped gate electrodes and fabrication methods thereof' [patent_app_type] => new [patent_app_number] => 10/683782 [patent_app_country] => US [patent_app_date] => 2003-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11289 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113212.pdf [firstpage_image] =>[orig_patent_app_number] => 10683782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7114402 [patent_doc_number] => 20050067702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Plasma surface modification and passivation of organo-silicate glass films for improved hardmask adhesion and optimal RIE processing' [patent_app_type] => utility [patent_app_number] => 10/674646 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4505 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20050067702.pdf [firstpage_image] =>[orig_patent_app_number] => 10674646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7396940 [patent_doc_number] => 20040104449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Three- dimensional metal devices highly suspended above semiconductor substrate, their circuit model, and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/473555 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9884 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20040104449.pdf [firstpage_image] =>[orig_patent_app_number] => 10473555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 630374 [patent_doc_number] => 07132334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-07 [patent_title] => 'Methods of code programming a mask ROM device' [patent_app_type] => utility [patent_app_number] => 10/668906 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 4575 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/132/07132334.pdf [firstpage_image] =>[orig_patent_app_number] => 10668906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7080557 [patent_doc_number] => 20050045937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'FENCE-FREE ETCHING OF IRIDIUM BARRIER HAVING A STEEP TAPER ANGLE' [patent_app_type] => utility [patent_app_number] => 10/654376 [patent_app_country] => US [patent_app_date] => 2003-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2257 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20050045937.pdf [firstpage_image] =>[orig_patent_app_number] => 10654376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7285252 [patent_doc_number] => 20040107909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Plasma immersion ion implantation process using a plasma source having low dissociation and low minimum plasma voltage' [patent_app_type] => new [patent_app_number] => 10/646533 [patent_app_country] => US [patent_app_date] => 2003-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 86 [patent_figures_cnt] => 86 [patent_no_of_words] => 39972 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20040107909.pdf [firstpage_image] =>[orig_patent_app_number] => 10646533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7465315 [patent_doc_number] => 20040053466 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/642955 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9557 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20040053466.pdf [firstpage_image] =>[orig_patent_app_number] => 10642955 [rel_patent_id] =>[rel_patent_doc_number] =>)