Search

Darlington Ly

Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2962, 2914, 2917
Total Applications
4527
Issued Applications
4184
Pending Applications
73
Abandoned Applications
287

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7429216 [patent_doc_number] => 20040209437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Method of forming a shallow trench isolation region in strained silicon layer and in an underlying on silicon - germanium layer' [patent_app_type] => new [patent_app_number] => 10/417316 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2034 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209437.pdf [firstpage_image] =>[orig_patent_app_number] => 10417316 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/417316
Method of forming a shallow trench isolation region in strained silicon layer and in an underlying on silicon - germanium layer Apr 15, 2003 Abandoned
Array ( [id] => 1035033 [patent_doc_number] => 06876027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Method of forming a metal-insulator-metal capacitor structure in a copper damascene process sequence' [patent_app_type] => utility [patent_app_number] => 10/411346 [patent_app_country] => US [patent_app_date] => 2003-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2217 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/876/06876027.pdf [firstpage_image] =>[orig_patent_app_number] => 10411346 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411346
Method of forming a metal-insulator-metal capacitor structure in a copper damascene process sequence Apr 9, 2003 Issued
Array ( [id] => 6662184 [patent_doc_number] => 20030201510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'High voltage device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/401790 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2910 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201510.pdf [firstpage_image] =>[orig_patent_app_number] => 10401790 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401790
High voltage device and method for fabricating the same Mar 30, 2003 Issued
Array ( [id] => 6730327 [patent_doc_number] => 20030186517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Method of and apparatus for manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/401591 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6915 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20030186517.pdf [firstpage_image] =>[orig_patent_app_number] => 10401591 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401591
Method of and apparatus for manufacturing semiconductor device Mar 30, 2003 Abandoned
Array ( [id] => 7344161 [patent_doc_number] => 20040191998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'PRESERVING TEOS HARD MASK USING COR FOR RAISED SOURCE-DRAIN INCLUDING REMOVABLE/DISPOSABLE SPACER' [patent_app_type] => new [patent_app_number] => 10/249296 [patent_app_country] => US [patent_app_date] => 2003-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4078 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20040191998.pdf [firstpage_image] =>[orig_patent_app_number] => 10249296 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249296
Preserving TEOS hard mask using COR for raised source-drain including removable/disposable spacer Mar 27, 2003 Issued
Array ( [id] => 7631399 [patent_doc_number] => 06635533 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Method of fabricating flash memory' [patent_app_type] => B1 [patent_app_number] => 10/249256 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2715 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/635/06635533.pdf [firstpage_image] =>[orig_patent_app_number] => 10249256 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249256
Method of fabricating flash memory Mar 26, 2003 Issued
Array ( [id] => 7344076 [patent_doc_number] => 20040191974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Method for fabricating dual-metal gate device' [patent_app_type] => new [patent_app_number] => 10/400896 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3714 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20040191974.pdf [firstpage_image] =>[orig_patent_app_number] => 10400896 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/400896
Method for fabricating dual-metal gate device Mar 26, 2003 Issued
Array ( [id] => 7313652 [patent_doc_number] => 20040033678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-19 [patent_title] => 'Method and apparatus to prevent lateral oxidation in a transistor utilizing an ultra thin oxygen-diffusion barrier' [patent_app_type] => new [patent_app_number] => 10/397776 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5250 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20040033678.pdf [firstpage_image] =>[orig_patent_app_number] => 10397776 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397776
Method and apparatus to prevent lateral oxidation in a transistor utilizing an ultra thin oxygen-diffusion barrier Mar 24, 2003 Abandoned
Array ( [id] => 1231335 [patent_doc_number] => 06693003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => B2 [patent_app_number] => 10/388475 [patent_app_country] => US [patent_app_date] => 2003-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 3606 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693003.pdf [firstpage_image] =>[orig_patent_app_number] => 10388475 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388475
Semiconductor device and manufacturing method of the same Mar 16, 2003 Issued
Array ( [id] => 6740404 [patent_doc_number] => 20030157773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Semiconductor device having a dielectric layer with a uniform nitrogen profile' [patent_app_type] => new [patent_app_number] => 10/388946 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3349 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20030157773.pdf [firstpage_image] =>[orig_patent_app_number] => 10388946 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388946
Semiconductor device having a dielectric layer with a uniform nitrogen profile Mar 12, 2003 Abandoned
Array ( [id] => 7471601 [patent_doc_number] => 20040121568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Methods of fabricating devices by low pressure cold welding' [patent_app_type] => new [patent_app_number] => 10/387925 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13153 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121568.pdf [firstpage_image] =>[orig_patent_app_number] => 10387925 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387925
Methods of fabricating devices by low pressure cold welding Mar 12, 2003 Issued
Array ( [id] => 8642517 [patent_doc_number] => 08367500 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-05 [patent_title] => 'Method of forming self aligned contacts for a power MOSFET' [patent_app_type] => utility [patent_app_number] => 10/378766 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5375 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 10378766 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/378766
Method of forming self aligned contacts for a power MOSFET Mar 2, 2003 Issued
Array ( [id] => 6847149 [patent_doc_number] => 20030166316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'Method of manufacturing field effect transistors' [patent_app_type] => new [patent_app_number] => 10/378576 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3612 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20030166316.pdf [firstpage_image] =>[orig_patent_app_number] => 10378576 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/378576
Method of manufacturing field effect transistors Feb 27, 2003 Abandoned
Array ( [id] => 6821783 [patent_doc_number] => 20030219944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Method for manufacturing a nonvolatile memory device' [patent_app_type] => new [patent_app_number] => 10/377016 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5273 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20030219944.pdf [firstpage_image] =>[orig_patent_app_number] => 10377016 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377016
Method for manufacturing a nonvolatile memory device including an opening formed into an inverse-tapered shape Feb 27, 2003 Issued
Array ( [id] => 7625545 [patent_doc_number] => 06723624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Method for fabricating n-type carbon nanotube device' [patent_app_type] => B2 [patent_app_number] => 10/369540 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 1739 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/723/06723624.pdf [firstpage_image] =>[orig_patent_app_number] => 10369540 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/369540
Method for fabricating n-type carbon nanotube device Feb 20, 2003 Issued
Array ( [id] => 6843224 [patent_doc_number] => 20030148571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Method for avoiding the ion penetration with the plasma doping' [patent_app_type] => new [patent_app_number] => 10/368469 [patent_app_country] => US [patent_app_date] => 2003-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3386 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148571.pdf [firstpage_image] =>[orig_patent_app_number] => 10368469 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/368469
Method for forming a gate Feb 19, 2003 Issued
Array ( [id] => 6843285 [patent_doc_number] => 20030148632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Method for avoiding the ion penetration with the plasma doping' [patent_app_type] => new [patent_app_number] => 10/368381 [patent_app_country] => US [patent_app_date] => 2003-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3387 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148632.pdf [firstpage_image] =>[orig_patent_app_number] => 10368381 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/368381
Method for avoiding the ion penetration with the plasma doping Feb 19, 2003 Abandoned
Array ( [id] => 7235556 [patent_doc_number] => 20040157444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Photoresist intensive patterning and processing' [patent_app_type] => new [patent_app_number] => 10/361875 [patent_app_country] => US [patent_app_date] => 2003-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8600 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157444.pdf [firstpage_image] =>[orig_patent_app_number] => 10361875 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/361875
Photoresist intensive patterning and processing Feb 9, 2003 Issued
Array ( [id] => 6851605 [patent_doc_number] => 20030143808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'FABRICATION METHOD FOR FLASH MEMORY' [patent_app_type] => new [patent_app_number] => 10/359316 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3551 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20030143808.pdf [firstpage_image] =>[orig_patent_app_number] => 10359316 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/359316
Fabrication method for flash memory Feb 5, 2003 Issued
Array ( [id] => 6851655 [patent_doc_number] => 20030143858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Process for the plasma etching of materials not containing silicon' [patent_app_type] => new [patent_app_number] => 10/356106 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2103 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20030143858.pdf [firstpage_image] =>[orig_patent_app_number] => 10356106 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/356106
Process for the plasma etching of materials not containing silicon Jan 30, 2003 Issued
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