
Darlington Ly
Examiner (ID: 22, Phone: (571)272-2617 , Office: P/2914 )
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2962, 2914, 2917 |
| Total Applications | 4527 |
| Issued Applications | 4184 |
| Pending Applications | 73 |
| Abandoned Applications | 287 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1580252
[patent_doc_number] => 06448605
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Method of fabricating gate'
[patent_app_type] => B1
[patent_app_number] => 09/924904
[patent_app_country] => US
[patent_app_date] => 2001-08-08
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4923
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/448/06448605.pdf
[firstpage_image] =>[orig_patent_app_number] => 09924904
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Array
(
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[patent_doc_number] => 06436771
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[patent_kind] => B1
[patent_issue_date] => 2002-08-20
[patent_title] => 'Method of forming a semiconductor device with multiple thickness gate dielectric layers'
[patent_app_type] => B1
[patent_app_number] => 09/902895
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[patent_app_date] => 2001-07-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/902895 | Method of forming a semiconductor device with multiple thickness gate dielectric layers | Jul 11, 2001 | Issued |
Array
(
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[patent_doc_number] => 07008832
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[patent_kind] => B1
[patent_issue_date] => 2006-03-07
[patent_title] => 'Damascene process for a T-shaped gate electrode'
[patent_app_type] => utility
[patent_app_number] => 09/900986
[patent_app_country] => US
[patent_app_date] => 2001-07-09
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/900986 | Damascene process for a T-shaped gate electrode | Jul 8, 2001 | Issued |
Array
(
[id] => 1490165
[patent_doc_number] => 06417055
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[patent_kind] => B2
[patent_issue_date] => 2002-07-09
[patent_title] => 'Method for forming gate electrode for a semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 09/895295
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/895295 | Method for forming gate electrode for a semiconductor device | Jul 1, 2001 | Issued |
Array
(
[id] => 6474342
[patent_doc_number] => 20020022344
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[patent_issue_date] => 2002-02-21
[patent_title] => 'Surface finishing of SOI substrates using an EPI process'
[patent_app_type] => new
[patent_app_number] => 09/893340
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[patent_app_date] => 2001-06-26
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Array
(
[id] => 5968517
[patent_doc_number] => 20020090778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-11
[patent_title] => 'Method for fabricating a cylinder-type capacitor for a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 09/886066
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/886066 | Method for fabricating a cylinder-type capacitor for a semiconductor device | Jun 20, 2001 | Issued |
Array
(
[id] => 6880268
[patent_doc_number] => 20010031555
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-10-18
[patent_title] => 'METHOD FOR FORMING ALUMINUM INTERCONNECTION'
[patent_app_type] => new
[patent_app_number] => 09/885343
[patent_app_country] => US
[patent_app_date] => 2001-06-18
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09885343
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/885343 | Method for forming aluminum interconnection | Jun 17, 2001 | Issued |
Array
(
[id] => 1466990
[patent_doc_number] => 06458661
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[patent_kind] => B1
[patent_issue_date] => 2002-10-01
[patent_title] => 'Method of forming NROM'
[patent_app_type] => B1
[patent_app_number] => 09/881765
[patent_app_country] => US
[patent_app_date] => 2001-06-18
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/881765 | Method of forming NROM | Jun 17, 2001 | Issued |
Array
(
[id] => 1507348
[patent_doc_number] => 06440807
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-27
[patent_title] => 'Surface engineering to prevent EPI growth on gate poly during selective EPI processing'
[patent_app_type] => B1
[patent_app_number] => 09/882095
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/882095 | Surface engineering to prevent EPI growth on gate poly during selective EPI processing | Jun 14, 2001 | Issued |
Array
(
[id] => 1424231
[patent_doc_number] => 06503800
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-01-07
[patent_title] => 'Manufacturing method of semiconductor device having different gate oxide thickness'
[patent_app_type] => B2
[patent_app_number] => 09/881945
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[patent_app_date] => 2001-06-15
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Array
(
[id] => 6880247
[patent_doc_number] => 20010031534
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-10-18
[patent_title] => 'Semiconductor device and method of manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/879200 | Method for forming semiconductor device having a gate in the trench | Jun 12, 2001 | Issued |
Array
(
[id] => 1542551
[patent_doc_number] => 06372576
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[patent_kind] => B1
[patent_issue_date] => 2002-04-16
[patent_title] => 'Method for manufacturing a floating gate in a flash memory device'
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Array
(
[id] => 6327442
[patent_doc_number] => 20020197836
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[patent_title] => 'Method of forming variable oxide thicknesses across semiconductor chips'
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Array
(
[id] => 6921592
[patent_doc_number] => 20010029077
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[patent_title] => 'Ultra high density flash memory'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862294 | Ultra-shallow junction formation for deep sub-micron complementary metal-oxide-semiconductor | May 21, 2001 | Abandoned |
Array
(
[id] => 1188837
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[patent_issue_date] => 2004-05-11
[patent_title] => 'Method to form silicates as high dielectric constant materials'
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[patent_app_number] => 09/851318
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/851318 | Method to form silicates as high dielectric constant materials | May 8, 2001 | Issued |
Array
(
[id] => 1220464
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[patent_title] => 'Method of manufacturing a semiconductor device'
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Array
(
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Array
(
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[patent_title] => 'Method of fabricating semiconductor device having ferroelectric capacitor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/838186 | Method of fabricating semiconductor device having ferroelectric capacitor | Apr 19, 2001 | Issued |
Array
(
[id] => 6884936
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/838316 | Method for fabricating silicon-on-insulator material | Apr 19, 2001 | Abandoned |