Darlington Ly

Array ( [id] => 3964765 [patent_doc_number] => 05885868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'Process for fabricating SOI compact contactless flash memory cell' [patent_app_type] => 1 [patent_app_number] => 8/789202 [patent_app_country] => US [patent_app_date] => 1997-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3702 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/885/05885868.pdf [firstpage_image] =>[orig_patent_app_number] => 789202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031001 [patent_doc_number] => 05963808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Method of forming an asymmetric bird\'s beak cell for a flash EEPROM' [patent_app_type] => 1 [patent_app_number] => 8/783995 [patent_app_country] => US [patent_app_date] => 1997-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 5248 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963808.pdf [firstpage_image] =>[orig_patent_app_number] => 783995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3896461 [patent_doc_number] => 05897354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method of forming a non-volatile memory device with ramped tunnel dielectric layer' [patent_app_type] => 1 [patent_app_number] => 8/768885 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 6505 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/897/05897354.pdf [firstpage_image] =>[orig_patent_app_number] => 768885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4235453 [patent_doc_number] => 06143609 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Method for forming semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/824476 [patent_app_country] => US [patent_app_date] => 1996-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 3743 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143609.pdf [firstpage_image] =>[orig_patent_app_number] => 824476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1550389 [patent_doc_number] => 06399466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-04 [patent_title] => 'Method of manufacturing non-volatile semiconductor memory device storing charge in gate insulating layer therein' [patent_app_type] => B2 [patent_app_number] => 08/730016 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 2609 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/399/06399466.pdf [firstpage_image] =>[orig_patent_app_number] => 08730016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3786004 [patent_doc_number] => 05840607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Method of forming undoped/in-situ doped/undoped polysilicon sandwich for floating gate application' [patent_app_type] => 1 [patent_app_number] => 8/729996 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2786 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/840/05840607.pdf [firstpage_image] =>[orig_patent_app_number] => 729996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3934831 [patent_doc_number] => 05972746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Method for manufacturing semiconductor devices using double-charged implantation' [patent_app_type] => 1 [patent_app_number] => 8/727076 [patent_app_country] => US [patent_app_date] => 1996-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 4305 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/972/05972746.pdf [firstpage_image] =>[orig_patent_app_number] => 727076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4408209 [patent_doc_number] => 06265266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Method of forming a two transistor flash EPROM cell' [patent_app_type] => 1 [patent_app_number] => 8/722596 [patent_app_country] => US [patent_app_date] => 1996-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4632 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/265/06265266.pdf [firstpage_image] =>[orig_patent_app_number] => 722596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3867580 [patent_doc_number] => 05837585 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Method of fabricating flash memory cell' [patent_app_type] => 1 [patent_app_number] => 8/685306 [patent_app_country] => US [patent_app_date] => 1996-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2005 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/837/05837585.pdf [firstpage_image] =>[orig_patent_app_number] => 685306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1053192 [patent_doc_number] => 06858520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 08/573145 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2112 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/858/06858520.pdf [firstpage_image] =>[orig_patent_app_number] => 08573145 [rel_patent_id] =>[rel_patent_doc_number] =>)