David A. Okonsky

Array ( [id] => 9575951 [patent_doc_number] => 08766368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Semiconductor devices having double-layered metal contacts and methods of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/615092 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5500 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13615092 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9259853 [patent_doc_number] => 20130341782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'SEMICONDUCTOR PACKAGE MODULE' [patent_app_type] => utility [patent_app_number] => 13/614112 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6276 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614112 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10544734 [patent_doc_number] => 09269872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-02-23 [patent_title] => 'Molded electronic package geometry to control warpage and die stress' [patent_app_type] => utility [patent_app_number] => 13/614631 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 4881 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8825914 [patent_doc_number] => 20130126959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/613473 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8880770 [patent_doc_number] => 20130153954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/614503 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8812 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9360552 [patent_doc_number] => 20140070423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'TUNABLE COMPOSITE INTERPOSER' [patent_app_type] => utility [patent_app_number] => 13/613611 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 16528 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9031650 [patent_doc_number] => 20130234288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'Trench Structure for an MIM Capacitor and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 13/614893 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614893 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10858158 [patent_doc_number] => 08884362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 13/614791 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 7782 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11638226 [patent_doc_number] => 09660213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Organic EL element and manufacturing method thereof, and metal oxide film forming method' [patent_app_type] => utility [patent_app_number] => 14/112357 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8718 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14112357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8499646 [patent_doc_number] => 20120299054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/530727 [patent_app_country] => US [patent_app_date] => 2012-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3273 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13530727 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10883043 [patent_doc_number] => 08907425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/528526 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 12682 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13528526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8480999 [patent_doc_number] => 20120280406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/493547 [patent_app_country] => US [patent_app_date] => 2012-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14826 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10857335 [patent_doc_number] => 08883530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Device manufacturing method and organic EL device' [patent_app_type] => utility [patent_app_number] => 13/491020 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 68 [patent_no_of_words] => 12695 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491020 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10583805 [patent_doc_number] => 09305931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Zero cost NVM cell using high voltage devices in analog process' [patent_app_type] => utility [patent_app_number] => 13/468417 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4707 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13146281 [patent_doc_number] => 10090482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Transistors [patent_app_type] => utility [patent_app_number] => 14/112157 [patent_app_country] => US [patent_app_date] => 2012-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2779 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14112157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10522512 [patent_doc_number] => 09249009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Starting substrate for semiconductor engineering having substrate-through connections and a method for making same' [patent_app_type] => utility [patent_app_number] => 14/112403 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3154 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14112403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9079149 [patent_doc_number] => 20130264679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'PLANAR POLYSILICON REGIONS FOR PRECISION RESISTORS AND ELECTRICAL FUSES AND METHOD OF FABRICATION' [patent_app_type] => utility [patent_app_number] => 13/440172 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8486917 [patent_doc_number] => 20120286324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'MANUFACTURING METHOD FOR INSULATED-GATE BIPOLAR TRANSITOR AND DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/440057 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9167297 [patent_doc_number] => 08592979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Semiconductor device conductive pattern structures and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/440123 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 6780 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10073632 [patent_doc_number] => 09111998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Multi-level stack having multi-level contact and method' [patent_app_type] => utility [patent_app_number] => 13/439087 [patent_app_country] => US [patent_app_date] => 2012-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3572 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13439087 [rel_patent_id] =>[rel_patent_doc_number] =>)