Search

David A Zarneke

Examiner (ID: 17793, Phone: (571)272-1937 , Office: P/2891 )

Most Active Art Unit
2891
Art Unit(s)
2829, 2812, 2827, 2891
Total Applications
2255
Issued Applications
1829
Pending Applications
145
Abandoned Applications
326

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4778950 [patent_doc_number] => 20080286948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Fabrication Method of Semiconductor Integrated Circuit Device' [patent_app_type] => utility [patent_app_number] => 12/170020 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17266 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20080286948.pdf [firstpage_image] =>[orig_patent_app_number] => 12170020 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/170020
Fabrication method of semiconductor integrated circuit device Jul 8, 2008 Issued
Array ( [id] => 4757234 [patent_doc_number] => 20080309459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Method Of Manufacturing A Fingerprint Sensor And Corresponding Sensor' [patent_app_type] => utility [patent_app_number] => 12/165529 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2803 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20080309459.pdf [firstpage_image] =>[orig_patent_app_number] => 12165529 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/165529
Method Of Manufacturing A Fingerprint Sensor And Corresponding Sensor Jun 29, 2008 Abandoned
Array ( [id] => 573263 [patent_doc_number] => 07459347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'Manufacturing method of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/213779 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 181 [patent_no_of_words] => 23419 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/459/07459347.pdf [firstpage_image] =>[orig_patent_app_number] => 12213779 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213779
Manufacturing method of a semiconductor device Jun 23, 2008 Issued
Array ( [id] => 5397910 [patent_doc_number] => 20090317973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'METHOD OF FORMING A METAL SILICIDE LAYER, DEVICES INCORPORATING METAL SILICIDE LAYERS AND DESIGN STRUCTURES FOR THE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/142896 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0317/20090317973.pdf [firstpage_image] =>[orig_patent_app_number] => 12142896 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/142896
Method of forming a metal silicide layer, devices incorporating metal silicide layers and design structures for the devices Jun 19, 2008 Issued
Array ( [id] => 8114479 [patent_doc_number] => 08158459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Substrate bonding method and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/142030 [patent_app_country] => US [patent_app_date] => 2008-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 5674 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/158/08158459.pdf [firstpage_image] =>[orig_patent_app_number] => 12142030 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/142030
Substrate bonding method and semiconductor device Jun 18, 2008 Issued
Array ( [id] => 4849659 [patent_doc_number] => 20080315401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Power Semiconductor Module And Method of Manufacturing the Power Semiconductor Module' [patent_app_type] => utility [patent_app_number] => 12/141670 [patent_app_country] => US [patent_app_date] => 2008-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10099 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20080315401.pdf [firstpage_image] =>[orig_patent_app_number] => 12141670 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/141670
Power Semiconductor Module And Method of Manufacturing the Power Semiconductor Module Jun 17, 2008 Abandoned
Array ( [id] => 7515870 [patent_doc_number] => 08039942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Ball grid array package stacking system' [patent_app_type] => utility [patent_app_number] => 12/141059 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3390 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/039/08039942.pdf [firstpage_image] =>[orig_patent_app_number] => 12141059 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/141059
Ball grid array package stacking system Jun 16, 2008 Issued
Array ( [id] => 5371666 [patent_doc_number] => 20090309226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'Interconnect Structure for Electromigration Enhancement' [patent_app_type] => utility [patent_app_number] => 12/139704 [patent_app_country] => US [patent_app_date] => 2008-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20090309226.pdf [firstpage_image] =>[orig_patent_app_number] => 12139704 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/139704
Interconnect structure for electromigration enhancement Jun 15, 2008 Issued
Array ( [id] => 4946997 [patent_doc_number] => 20080303123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFINGER' [patent_app_type] => utility [patent_app_number] => 12/134179 [patent_app_country] => US [patent_app_date] => 2008-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4140 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20080303123.pdf [firstpage_image] =>[orig_patent_app_number] => 12134179 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/134179
Integrated circuit package system with leadfinger Jun 4, 2008 Issued
Array ( [id] => 285413 [patent_doc_number] => 07550340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Silicon rich barrier layers for integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 12/120555 [patent_app_country] => US [patent_app_date] => 2008-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3372 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550340.pdf [firstpage_image] =>[orig_patent_app_number] => 12120555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/120555
Silicon rich barrier layers for integrated circuit devices May 13, 2008 Issued
Array ( [id] => 270882 [patent_doc_number] => 07564118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-21 [patent_title] => 'Chip and wafer integration process using vertical connections' [patent_app_type] => utility [patent_app_number] => 12/114145 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 3612 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/564/07564118.pdf [firstpage_image] =>[orig_patent_app_number] => 12114145 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/114145
Chip and wafer integration process using vertical connections May 1, 2008 Issued
Array ( [id] => 4870714 [patent_doc_number] => 20080197448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SiO2' [patent_app_type] => utility [patent_app_number] => 12/112549 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2285 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197448.pdf [firstpage_image] =>[orig_patent_app_number] => 12112549 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/112549
SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SiO2 Apr 29, 2008 Abandoned
Array ( [id] => 4612841 [patent_doc_number] => 07989267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Manufacturing method of semiconductor device and manufacturing method of lead frame' [patent_app_type] => utility [patent_app_number] => 12/104154 [patent_app_country] => US [patent_app_date] => 2008-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 7029 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989267.pdf [firstpage_image] =>[orig_patent_app_number] => 12104154 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/104154
Manufacturing method of semiconductor device and manufacturing method of lead frame Apr 15, 2008 Issued
Array ( [id] => 228813 [patent_doc_number] => 07601626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-13 [patent_title] => 'Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/102416 [patent_app_country] => US [patent_app_date] => 2008-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 5852 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/601/07601626.pdf [firstpage_image] =>[orig_patent_app_number] => 12102416 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/102416
Method for manufacturing semiconductor device, and method and structure for implementing semiconductor device Apr 13, 2008 Issued
Array ( [id] => 366521 [patent_doc_number] => 07479412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-20 [patent_title] => 'Adhesive film for semiconductor, lead frame and semiconductor device using the same, and method of producing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/099238 [patent_app_country] => US [patent_app_date] => 2008-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 13968 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/479/07479412.pdf [firstpage_image] =>[orig_patent_app_number] => 12099238 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099238
Adhesive film for semiconductor, lead frame and semiconductor device using the same, and method of producing semiconductor device Apr 7, 2008 Issued
Array ( [id] => 4955007 [patent_doc_number] => 20080188031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Packaging method of a light-sensing semiconductor device and packaging structure thereof' [patent_app_type] => utility [patent_app_number] => 12/078819 [patent_app_country] => US [patent_app_date] => 2008-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1995 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20080188031.pdf [firstpage_image] =>[orig_patent_app_number] => 12078819 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/078819
Packaging method of a light-sensing semiconductor device and packaging structure thereof Apr 6, 2008 Issued
Array ( [id] => 168089 [patent_doc_number] => 07666695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Array substrates of liquid crystal display and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/056749 [patent_app_country] => US [patent_app_date] => 2008-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 34 [patent_no_of_words] => 8810 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/666/07666695.pdf [firstpage_image] =>[orig_patent_app_number] => 12056749 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/056749
Array substrates of liquid crystal display and fabrication method thereof Mar 26, 2008 Issued
Array ( [id] => 4433457 [patent_doc_number] => 07968978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Microwave integrated circuit package and method for forming such package' [patent_app_type] => utility [patent_app_number] => 12/052158 [patent_app_country] => US [patent_app_date] => 2008-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 5032 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/968/07968978.pdf [firstpage_image] =>[orig_patent_app_number] => 12052158 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/052158
Microwave integrated circuit package and method for forming such package Mar 19, 2008 Issued
Array ( [id] => 5401417 [patent_doc_number] => 20090236730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'Die substrate with reinforcement structure' [patent_app_type] => utility [patent_app_number] => 12/051330 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20090236730.pdf [firstpage_image] =>[orig_patent_app_number] => 12051330 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/051330
Die substrate with reinforcement structure Mar 18, 2008 Issued
Array ( [id] => 4583052 [patent_doc_number] => 07851345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Semiconductor device and method of forming oxide layer on signal traces for electrical isolation in fine pitch bonding' [patent_app_type] => utility [patent_app_number] => 12/051349 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 3511 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/851/07851345.pdf [firstpage_image] =>[orig_patent_app_number] => 12051349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/051349
Semiconductor device and method of forming oxide layer on signal traces for electrical isolation in fine pitch bonding Mar 18, 2008 Issued
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