
David A Zarneke
Examiner (ID: 17793, Phone: (571)272-1937 , Office: P/2891 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2829, 2812, 2827, 2891 |
| Total Applications | 2255 |
| Issued Applications | 1829 |
| Pending Applications | 145 |
| Abandoned Applications | 326 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 299766
[patent_doc_number] => 07537965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-26
[patent_title] => 'Manufacturing method for a leadless multi-chip electronic module'
[patent_app_type] => utility
[patent_app_number] => 11/471869
[patent_app_country] => US
[patent_app_date] => 2006-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2067
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/537/07537965.pdf
[firstpage_image] =>[orig_patent_app_number] => 11471869
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/471869 | Manufacturing method for a leadless multi-chip electronic module | Jun 20, 2006 | Issued |
Array
(
[id] => 259996
[patent_doc_number] => 07572721
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Method of forming a semiconductor device having an etch stop layer and related device'
[patent_app_type] => utility
[patent_app_number] => 11/424518
[patent_app_country] => US
[patent_app_date] => 2006-06-15
[patent_effective_date] => 0000-00-00
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/572/07572721.pdf
[firstpage_image] =>[orig_patent_app_number] => 11424518
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424518 | Method of forming a semiconductor device having an etch stop layer and related device | Jun 14, 2006 | Issued |
Array
(
[id] => 4648843
[patent_doc_number] => 20080036098
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-14
[patent_title] => 'CONFIGURABLE UNIVERSAL INTERCONNECT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/424159
[patent_app_country] => US
[patent_app_date] => 2006-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0036/20080036098.pdf
[firstpage_image] =>[orig_patent_app_number] => 11424159
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424159 | CONFIGURABLE UNIVERSAL INTERCONNECT DEVICE | Jun 13, 2006 | Abandoned |
Array
(
[id] => 13513
[patent_doc_number] => 07807550
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-05
[patent_title] => 'Method of making MEMS wafers'
[patent_app_type] => utility
[patent_app_number] => 11/424059
[patent_app_country] => US
[patent_app_date] => 2006-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/07/807/07807550.pdf
[firstpage_image] =>[orig_patent_app_number] => 11424059
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424059 | Method of making MEMS wafers | Jun 13, 2006 | Issued |
Array
(
[id] => 8256641
[patent_doc_number] => 08206113
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-26
[patent_title] => 'Method and apparatus for converting marine wave energy by means of a difference in flow resistance form factors into electricity'
[patent_app_type] => utility
[patent_app_number] => 12/303186
[patent_app_country] => US
[patent_app_date] => 2006-06-02
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12303186
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/303186 | Method and apparatus for converting marine wave energy by means of a difference in flow resistance form factors into electricity | Jun 1, 2006 | Issued |
Array
(
[id] => 5751062
[patent_doc_number] => 20060220211
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-05
[patent_title] => 'Method for manufacturing semiconductor apparatus, and semiconductor apparatus and electric appliance'
[patent_app_type] => utility
[patent_app_number] => 11/440116
[patent_app_country] => US
[patent_app_date] => 2006-05-25
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[firstpage_image] =>[orig_patent_app_number] => 11440116
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/440116 | Method for manufacturing semiconductor apparatus, and semiconductor apparatus and electric appliance | May 24, 2006 | Issued |
Array
(
[id] => 243679
[patent_doc_number] => 07589416
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[patent_issue_date] => 2009-09-15
[patent_title] => 'Substrate, electronic component, and manufacturing method of these'
[patent_app_type] => utility
[patent_app_number] => 11/420219
[patent_app_country] => US
[patent_app_date] => 2006-05-24
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/589/07589416.pdf
[firstpage_image] =>[orig_patent_app_number] => 11420219
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/420219 | Substrate, electronic component, and manufacturing method of these | May 23, 2006 | Issued |
Array
(
[id] => 586219
[patent_doc_number] => 07449775
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-11-11
[patent_title] => 'Integrated thermal solution for electronic packages with materials having mismatched coefficient of thermal expansion'
[patent_app_type] => utility
[patent_app_number] => 11/439039
[patent_app_country] => US
[patent_app_date] => 2006-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3934
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[pdf_file] => patents/07/449/07449775.pdf
[firstpage_image] =>[orig_patent_app_number] => 11439039
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/439039 | Integrated thermal solution for electronic packages with materials having mismatched coefficient of thermal expansion | May 21, 2006 | Issued |
Array
(
[id] => 5028487
[patent_doc_number] => 20070269934
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-22
[patent_title] => 'System and method for providing access to an encapsulated device'
[patent_app_type] => utility
[patent_app_number] => 11/434768
[patent_app_country] => US
[patent_app_date] => 2006-05-17
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[firstpage_image] =>[orig_patent_app_number] => 11434768
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/434768 | System and method for providing access to an encapsulated device | May 16, 2006 | Issued |
Array
(
[id] => 202453
[patent_doc_number] => 07632698
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-15
[patent_title] => 'Integrated circuit encapsulation and method therefor'
[patent_app_type] => utility
[patent_app_number] => 11/383649
[patent_app_country] => US
[patent_app_date] => 2006-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/07/632/07632698.pdf
[firstpage_image] =>[orig_patent_app_number] => 11383649
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/383649 | Integrated circuit encapsulation and method therefor | May 15, 2006 | Issued |
Array
(
[id] => 5785530
[patent_doc_number] => 20060205117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-14
[patent_title] => 'Solder masks used in encapsulation, assemblies including the solar mask, and methods'
[patent_app_type] => utility
[patent_app_number] => 11/434620
[patent_app_country] => US
[patent_app_date] => 2006-05-15
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[pdf_file] => publications/A1/0205/20060205117.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/434620 | Solder masks used in encapsulation, assemblies including the solar mask, and methods | May 14, 2006 | Abandoned |
Array
(
[id] => 204473
[patent_doc_number] => 07629204
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-08
[patent_title] => 'Surface roughening method for embedded semiconductor chip structure'
[patent_app_type] => utility
[patent_app_number] => 11/432369
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[patent_app_date] => 2006-05-12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/432369 | Surface roughening method for embedded semiconductor chip structure | May 11, 2006 | Issued |
Array
(
[id] => 5785574
[patent_doc_number] => 20060205135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-14
[patent_title] => 'Silicon rich barrier layers for integrated circuit devices'
[patent_app_type] => utility
[patent_app_number] => 11/430792
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/430792 | Silicon rich barrier layers for integrated circuit devices | May 8, 2006 | Issued |
Array
(
[id] => 7599488
[patent_doc_number] => 07582960
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[patent_title] => 'Multiple chip package module including die stacked over encapsulated package'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/381901 | Multiple chip package module including die stacked over encapsulated package | May 4, 2006 | Issued |
Array
(
[id] => 5659256
[patent_doc_number] => 20060249852
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/417548 | Flip-chip semiconductor device | May 2, 2006 | Abandoned |
Array
(
[id] => 425055
[patent_doc_number] => 07271037
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[patent_title] => 'Leadframe alteration to direct compound flow into package'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/417620 | Leadframe alteration to direct compound flow into package | May 2, 2006 | Issued |
Array
(
[id] => 5683093
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/415148 | Method for cutting junction board, and chip | May 1, 2006 | Issued |
Array
(
[id] => 5730317
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[firstpage_image] =>[orig_patent_app_number] => 11413149
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Array
(
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[pdf_file] => patents/07/459/07459341.pdf
[firstpage_image] =>[orig_patent_app_number] => 11411884
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/411884 | Method of manufacturing an electronic device | Apr 26, 2006 | Issued |