
David Armand Wiley
Director (ID: 6423, Phone: (571)272-4150 , Office: P/2100 )
| Most Active Art Unit | 2781 |
| Art Unit(s) | 2100, 2855, 2143, 2155, 2174, 2305, 2158, 2781, 3781 |
| Total Applications | 523 |
| Issued Applications | 399 |
| Pending Applications | 75 |
| Abandoned Applications | 54 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4211938
[patent_doc_number] => 06044472
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'Device and method for supplying power to an external data medium reader unit connected to a computer, and external reader unit including this device'
[patent_app_type] => 1
[patent_app_number] => 8/880155
[patent_app_country] => US
[patent_app_date] => 1997-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 5436
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/044/06044472.pdf
[firstpage_image] =>[orig_patent_app_number] => 880155
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/880155 | Device and method for supplying power to an external data medium reader unit connected to a computer, and external reader unit including this device | Jun 19, 1997 | Issued |
Array
(
[id] => 3807399
[patent_doc_number] => 05842029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Method and apparatus for powering down an integrated circuit transparently and its phase locked loop'
[patent_app_type] => 1
[patent_app_number] => 8/878867
[patent_app_country] => US
[patent_app_date] => 1997-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 16668
[patent_no_of_claims] => 56
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/842/05842029.pdf
[firstpage_image] =>[orig_patent_app_number] => 878867
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/878867 | Method and apparatus for powering down an integrated circuit transparently and its phase locked loop | Jun 18, 1997 | Issued |
Array
(
[id] => 4042722
[patent_doc_number] => 05931950
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-03
[patent_title] => 'Wake-up-on-ring power conservation for host signal processing communication system'
[patent_app_type] => 1
[patent_app_number] => 8/877129
[patent_app_country] => US
[patent_app_date] => 1997-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3285
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/931/05931950.pdf
[firstpage_image] =>[orig_patent_app_number] => 877129
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/877129 | Wake-up-on-ring power conservation for host signal processing communication system | Jun 16, 1997 | Issued |
Array
(
[id] => 4171368
[patent_doc_number] => 06125419
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Bus system, printed circuit board, signal transmission line, series circuit and memory module'
[patent_app_type] => 1
[patent_app_number] => 8/874721
[patent_app_country] => US
[patent_app_date] => 1997-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 34
[patent_no_of_words] => 16089
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/125/06125419.pdf
[firstpage_image] =>[orig_patent_app_number] => 874721
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/874721 | Bus system, printed circuit board, signal transmission line, series circuit and memory module | Jun 12, 1997 | Issued |
Array
(
[id] => 3802453
[patent_doc_number] => 05822550
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Split data path fast at-bus on chip circuits systems and methods'
[patent_app_type] => 1
[patent_app_number] => 8/872727
[patent_app_country] => US
[patent_app_date] => 1997-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 71
[patent_no_of_words] => 92779
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822550.pdf
[firstpage_image] =>[orig_patent_app_number] => 872727
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/872727 | Split data path fast at-bus on chip circuits systems and methods | Jun 10, 1997 | Issued |
Array
(
[id] => 3923308
[patent_doc_number] => 05928346
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Method for enhanced peripheral component interconnect bus split data transfer'
[patent_app_type] => 1
[patent_app_number] => 8/873348
[patent_app_country] => US
[patent_app_date] => 1997-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7563
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/928/05928346.pdf
[firstpage_image] =>[orig_patent_app_number] => 873348
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873348 | Method for enhanced peripheral component interconnect bus split data transfer | Jun 10, 1997 | Issued |
Array
(
[id] => 3970981
[patent_doc_number] => 05991885
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-23
[patent_title] => 'Method and apparatus for detecting the presence of a remote device and providing power thereto'
[patent_app_type] => 1
[patent_app_number] => 8/872977
[patent_app_country] => US
[patent_app_date] => 1997-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 7615
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/991/05991885.pdf
[firstpage_image] =>[orig_patent_app_number] => 872977
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/872977 | Method and apparatus for detecting the presence of a remote device and providing power thereto | Jun 10, 1997 | Issued |
Array
(
[id] => 4121307
[patent_doc_number] => 06023743
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-08
[patent_title] => 'System and method for arbitrating interrupts on a daisy chained architected bus'
[patent_app_type] => 1
[patent_app_number] => 8/872590
[patent_app_country] => US
[patent_app_date] => 1997-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 6
[patent_no_of_words] => 3260
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/023/06023743.pdf
[firstpage_image] =>[orig_patent_app_number] => 872590
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/872590 | System and method for arbitrating interrupts on a daisy chained architected bus | Jun 9, 1997 | Issued |
Array
(
[id] => 3997984
[patent_doc_number] => 05862356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-19
[patent_title] => 'Pipelined distributed bus arbitration system'
[patent_app_type] => 1
[patent_app_number] => 8/870438
[patent_app_country] => US
[patent_app_date] => 1997-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 5625
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 397
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/862/05862356.pdf
[firstpage_image] =>[orig_patent_app_number] => 870438
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/870438 | Pipelined distributed bus arbitration system | Jun 3, 1997 | Issued |
Array
(
[id] => 3945391
[patent_doc_number] => 05935253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-10
[patent_title] => 'Method and apparatus for powering down an integrated circuit having a core that operates at a speed greater than the bus frequency'
[patent_app_type] => 1
[patent_app_number] => 8/868747
[patent_app_country] => US
[patent_app_date] => 1997-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 14735
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/935/05935253.pdf
[firstpage_image] =>[orig_patent_app_number] => 868747
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/868747 | Method and apparatus for powering down an integrated circuit having a core that operates at a speed greater than the bus frequency | Jun 3, 1997 | Issued |
Array
(
[id] => 4084933
[patent_doc_number] => 06009479
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-28
[patent_title] => 'System and method for assigning unique addresses to agents on a system management bus'
[patent_app_type] => 1
[patent_app_number] => 8/866678
[patent_app_country] => US
[patent_app_date] => 1997-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5882
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/009/06009479.pdf
[firstpage_image] =>[orig_patent_app_number] => 866678
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/866678 | System and method for assigning unique addresses to agents on a system management bus | May 29, 1997 | Issued |
Array
(
[id] => 4236356
[patent_doc_number] => 06041384
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-21
[patent_title] => 'Method for managing shared resources in a multiprocessing computer system'
[patent_app_type] => 1
[patent_app_number] => 8/866200
[patent_app_country] => US
[patent_app_date] => 1997-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 9113
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/041/06041384.pdf
[firstpage_image] =>[orig_patent_app_number] => 866200
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/866200 | Method for managing shared resources in a multiprocessing computer system | May 29, 1997 | Issued |
Array
(
[id] => 3943857
[patent_doc_number] => 05953509
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Multiprocessor interface adaptor with broadcast function'
[patent_app_type] => 1
[patent_app_number] => 8/853131
[patent_app_country] => US
[patent_app_date] => 1997-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 3
[patent_no_of_words] => 4712
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/953/05953509.pdf
[firstpage_image] =>[orig_patent_app_number] => 853131
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/853131 | Multiprocessor interface adaptor with broadcast function | May 7, 1997 | Issued |
Array
(
[id] => 4200417
[patent_doc_number] => 06021500
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-01
[patent_title] => 'Processor with sleep and deep sleep modes'
[patent_app_type] => 1
[patent_app_number] => 8/852174
[patent_app_country] => US
[patent_app_date] => 1997-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 27
[patent_no_of_words] => 11675
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/021/06021500.pdf
[firstpage_image] =>[orig_patent_app_number] => 852174
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/852174 | Processor with sleep and deep sleep modes | May 6, 1997 | Issued |
Array
(
[id] => 4171789
[patent_doc_number] => 06125448
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Power subsystem for a communication network containing a power bus'
[patent_app_type] => 1
[patent_app_number] => 8/850089
[patent_app_country] => US
[patent_app_date] => 1997-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 9426
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/125/06125448.pdf
[firstpage_image] =>[orig_patent_app_number] => 850089
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/850089 | Power subsystem for a communication network containing a power bus | May 1, 1997 | Issued |
Array
(
[id] => 3826166
[patent_doc_number] => 05832240
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-03
[patent_title] => 'ISDN-based high speed communication system'
[patent_app_type] => 1
[patent_app_number] => 8/843114
[patent_app_country] => US
[patent_app_date] => 1997-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 21
[patent_no_of_words] => 14442
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/832/05832240.pdf
[firstpage_image] =>[orig_patent_app_number] => 843114
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/843114 | ISDN-based high speed communication system | Apr 27, 1997 | Issued |
Array
(
[id] => 4031082
[patent_doc_number] => 05881255
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Bus control system incorporating the coupling of two split-transaction busses of different hierarchy'
[patent_app_type] => 1
[patent_app_number] => 8/847974
[patent_app_country] => US
[patent_app_date] => 1997-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 5082
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/881/05881255.pdf
[firstpage_image] =>[orig_patent_app_number] => 847974
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/847974 | Bus control system incorporating the coupling of two split-transaction busses of different hierarchy | Apr 20, 1997 | Issued |
Array
(
[id] => 3997056
[patent_doc_number] => 05961620
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-05
[patent_title] => 'Extensible communication type manager for a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/831766
[patent_app_country] => US
[patent_app_date] => 1997-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9487
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/961/05961620.pdf
[firstpage_image] =>[orig_patent_app_number] => 831766
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/831766 | Extensible communication type manager for a computer system | Mar 31, 1997 | Issued |
Array
(
[id] => 4048258
[patent_doc_number] => 05857115
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-05
[patent_title] => 'Method for controlling power to individual audio-video units making up an audio-video system'
[patent_app_type] => 1
[patent_app_number] => 8/822274
[patent_app_country] => US
[patent_app_date] => 1997-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 4664
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/857/05857115.pdf
[firstpage_image] =>[orig_patent_app_number] => 822274
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/822274 | Method for controlling power to individual audio-video units making up an audio-video system | Mar 19, 1997 | Issued |
Array
(
[id] => 4101142
[patent_doc_number] => 06018802
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-25
[patent_title] => 'Communication apparatus having power backup function for image memory'
[patent_app_type] => 1
[patent_app_number] => 8/804757
[patent_app_country] => US
[patent_app_date] => 1997-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5456
[patent_no_of_claims] => 91
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/018/06018802.pdf
[firstpage_image] =>[orig_patent_app_number] => 804757
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/804757 | Communication apparatus having power backup function for image memory | Feb 23, 1997 | Issued |