Search

David Armand Wiley

Director (ID: 6423, Phone: (571)272-4150 , Office: P/2100 )

Most Active Art Unit
2781
Art Unit(s)
2100, 2855, 2143, 2155, 2174, 2305, 2158, 2781, 3781
Total Applications
523
Issued Applications
399
Pending Applications
75
Abandoned Applications
54

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3872155 [patent_doc_number] => 05768546 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Method and apparatus for bi-directional transfer of data between two buses with different widths' [patent_app_type] => 1 [patent_app_number] => 8/658424 [patent_app_country] => US [patent_app_date] => 1996-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3198 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768546.pdf [firstpage_image] =>[orig_patent_app_number] => 658424 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/658424
Method and apparatus for bi-directional transfer of data between two buses with different widths Jun 4, 1996 Issued
08/653066 METHOD AND APPARATUS FOR MANAGING POWER CONSUMPTION OF PERIPHERAL DEVICES OF PERSONAL COMPUTER May 30, 1996 Abandoned
Array ( [id] => 3736860 [patent_doc_number] => 05701494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Microprocessor with multiple supervisor interrupt processing function' [patent_app_type] => 1 [patent_app_number] => 8/653486 [patent_app_country] => US [patent_app_date] => 1996-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 47 [patent_no_of_words] => 7424 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701494.pdf [firstpage_image] =>[orig_patent_app_number] => 653486 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/653486
Microprocessor with multiple supervisor interrupt processing function May 23, 1996 Issued
Array ( [id] => 4015008 [patent_doc_number] => 05923887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Interrupt request that defines resource usage' [patent_app_type] => 1 [patent_app_number] => 8/650570 [patent_app_country] => US [patent_app_date] => 1996-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5895 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923887.pdf [firstpage_image] =>[orig_patent_app_number] => 650570 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/650570
Interrupt request that defines resource usage May 19, 1996 Issued
Array ( [id] => 3905264 [patent_doc_number] => 05778236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Multiprocessing interrupt controller on I/O bus' [patent_app_type] => 1 [patent_app_number] => 8/649787 [patent_app_country] => US [patent_app_date] => 1996-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5872 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778236.pdf [firstpage_image] =>[orig_patent_app_number] => 649787 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649787
Multiprocessing interrupt controller on I/O bus May 16, 1996 Issued
Array ( [id] => 3826122 [patent_doc_number] => 05832237 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Portable computer system and method for controlling a power of system' [patent_app_type] => 1 [patent_app_number] => 8/649434 [patent_app_country] => US [patent_app_date] => 1996-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4086 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/832/05832237.pdf [firstpage_image] =>[orig_patent_app_number] => 649434 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649434
Portable computer system and method for controlling a power of system May 16, 1996 Issued
08/648257 METHOD AND APPARATUS FOR SELECTING AN OPTIMAL CAPABILITY BETWEEN A COMPUTER SYSTEM AND A PERIPHERAL DEVICE May 12, 1996 Abandoned
Array ( [id] => 4103600 [patent_doc_number] => 06026460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method and apparatus for sequencing system bus grants and disabling a posting buffer in a bus bridge to improve bus efficiency' [patent_app_type] => 1 [patent_app_number] => 8/644180 [patent_app_country] => US [patent_app_date] => 1996-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6375 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026460.pdf [firstpage_image] =>[orig_patent_app_number] => 644180 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/644180
Method and apparatus for sequencing system bus grants and disabling a posting buffer in a bus bridge to improve bus efficiency May 9, 1996 Issued
Array ( [id] => 3841576 [patent_doc_number] => 05784581 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Apparatus and method for operating a peripheral device as either a master device or a slave device' [patent_app_type] => 1 [patent_app_number] => 8/642387 [patent_app_country] => US [patent_app_date] => 1996-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784581.pdf [firstpage_image] =>[orig_patent_app_number] => 642387 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/642387
Apparatus and method for operating a peripheral device as either a master device or a slave device May 2, 1996 Issued
Array ( [id] => 3797125 [patent_doc_number] => 05758168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Interrupt vectoring for optionally architected facilities in computer systems' [patent_app_type] => 1 [patent_app_number] => 8/634468 [patent_app_country] => US [patent_app_date] => 1996-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5145 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758168.pdf [firstpage_image] =>[orig_patent_app_number] => 634468 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634468
Interrupt vectoring for optionally architected facilities in computer systems Apr 17, 1996 Issued
Array ( [id] => 3878490 [patent_doc_number] => 05793998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Method and apparatus for interconnection of multiple modules' [patent_app_type] => 1 [patent_app_number] => 8/633988 [patent_app_country] => US [patent_app_date] => 1996-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 8900 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793998.pdf [firstpage_image] =>[orig_patent_app_number] => 633988 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/633988
Method and apparatus for interconnection of multiple modules Apr 16, 1996 Issued
Array ( [id] => 3802713 [patent_doc_number] => 05737544 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Link system controller interface linking a PCI bus to multiple other buses' [patent_app_type] => 1 [patent_app_number] => 8/628969 [patent_app_country] => US [patent_app_date] => 1996-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2229 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737544.pdf [firstpage_image] =>[orig_patent_app_number] => 628969 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/628969
Link system controller interface linking a PCI bus to multiple other buses Apr 7, 1996 Issued
Array ( [id] => 3659711 [patent_doc_number] => 05630077 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'System and method for coordinating access to a bus' [patent_app_type] => 1 [patent_app_number] => 8/626905 [patent_app_country] => US [patent_app_date] => 1996-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6456 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/630/05630077.pdf [firstpage_image] =>[orig_patent_app_number] => 626905 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/626905
System and method for coordinating access to a bus Apr 3, 1996 Issued
Array ( [id] => 4101170 [patent_doc_number] => 06018804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Data bus isolator' [patent_app_type] => 1 [patent_app_number] => 8/621366 [patent_app_country] => US [patent_app_date] => 1996-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1874 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018804.pdf [firstpage_image] =>[orig_patent_app_number] => 621366 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621366
Data bus isolator Mar 24, 1996 Issued
Array ( [id] => 3813092 [patent_doc_number] => 05828856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Dual bus concurrent multi-channel direct memory access controller and method' [patent_app_type] => 1 [patent_app_number] => 8/621200 [patent_app_country] => US [patent_app_date] => 1996-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 13702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828856.pdf [firstpage_image] =>[orig_patent_app_number] => 621200 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621200
Dual bus concurrent multi-channel direct memory access controller and method Mar 20, 1996 Issued
Array ( [id] => 3849460 [patent_doc_number] => 05761452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Bus arbiter method and system' [patent_app_type] => 1 [patent_app_number] => 8/617413 [patent_app_country] => US [patent_app_date] => 1996-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3435 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761452.pdf [firstpage_image] =>[orig_patent_app_number] => 617413 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/617413
Bus arbiter method and system Mar 17, 1996 Issued
Array ( [id] => 3850439 [patent_doc_number] => 05761519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Portable computer having a removable medium drive and a resume setting function' [patent_app_type] => 1 [patent_app_number] => 8/609127 [patent_app_country] => US [patent_app_date] => 1996-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3406 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761519.pdf [firstpage_image] =>[orig_patent_app_number] => 609127 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/609127
Portable computer having a removable medium drive and a resume setting function Feb 28, 1996 Issued
08/600802 INITIALIZATION MECHANISM FOR SYMMETRIC ARBITRATION AGENTS Feb 12, 1996 Abandoned
Array ( [id] => 3604360 [patent_doc_number] => 05586336 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Microcomputer capable of monitoring internal resources from external' [patent_app_type] => 1 [patent_app_number] => 8/597688 [patent_app_country] => US [patent_app_date] => 1996-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5492 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586336.pdf [firstpage_image] =>[orig_patent_app_number] => 597688 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/597688
Microcomputer capable of monitoring internal resources from external Feb 5, 1996 Issued
Array ( [id] => 3718897 [patent_doc_number] => 05655126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Method & apparatus for a power management pseudo-device driver' [patent_app_type] => 1 [patent_app_number] => 8/594416 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4386 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/655/05655126.pdf [firstpage_image] =>[orig_patent_app_number] => 594416 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594416
Method & apparatus for a power management pseudo-device driver Jan 30, 1996 Issued
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