Search

David Armand Wiley

Examiner (ID: 5040)

Most Active Art Unit
2781
Art Unit(s)
2174, 2158, 2305, 2100, 2155, 3781, 2781, 2143, 2855
Total Applications
522
Issued Applications
399
Pending Applications
75
Abandoned Applications
53

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3709379 [patent_doc_number] => 05678050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Portable information processing system utilizing a wireless selective call receiver' [patent_app_type] => 1 [patent_app_number] => 8/475297 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4198 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/678/05678050.pdf [firstpage_image] =>[orig_patent_app_number] => 475297 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/475297
Portable information processing system utilizing a wireless selective call receiver Jun 6, 1995 Issued
Array ( [id] => 3523912 [patent_doc_number] => 05564026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Bus-to-bus pacing logic for improving information transfers in a multi-bus information handling system' [patent_app_type] => 1 [patent_app_number] => 8/477910 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14349 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/564/05564026.pdf [firstpage_image] =>[orig_patent_app_number] => 477910 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477910
Bus-to-bus pacing logic for improving information transfers in a multi-bus information handling system Jun 6, 1995 Issued
Array ( [id] => 3595501 [patent_doc_number] => 05581714 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Bus-to-bus read prefetch logic for improving information transfers in a multi-bus information handling system (bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus)' [patent_app_type] => 1 [patent_app_number] => 8/473659 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14337 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581714.pdf [firstpage_image] =>[orig_patent_app_number] => 473659 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473659
Bus-to-bus read prefetch logic for improving information transfers in a multi-bus information handling system (bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus) Jun 6, 1995 Issued
Array ( [id] => 3901704 [patent_doc_number] => 05715464 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Computer system having suspend once resume many sessions' [patent_app_type] => 1 [patent_app_number] => 8/473097 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 60 [patent_no_of_words] => 43193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715464.pdf [firstpage_image] =>[orig_patent_app_number] => 473097 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473097
Computer system having suspend once resume many sessions Jun 6, 1995 Issued
Array ( [id] => 3900786 [patent_doc_number] => 05715405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Transceiver circuit with transition detection' [patent_app_type] => 1 [patent_app_number] => 8/473588 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 7409 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715405.pdf [firstpage_image] =>[orig_patent_app_number] => 473588 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473588
Transceiver circuit with transition detection Jun 6, 1995 Issued
Array ( [id] => 3857409 [patent_doc_number] => 05848250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Processor upgrade system for a personal computer' [patent_app_type] => 1 [patent_app_number] => 8/468181 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9640 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/848/05848250.pdf [firstpage_image] =>[orig_patent_app_number] => 468181 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/468181
Processor upgrade system for a personal computer Jun 5, 1995 Issued
Array ( [id] => 3894794 [patent_doc_number] => 05826058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Method and apparatus for providing an external indication of internal cycles in a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/458390 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8262 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/826/05826058.pdf [firstpage_image] =>[orig_patent_app_number] => 458390 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/458390
Method and apparatus for providing an external indication of internal cycles in a data processing system Jun 1, 1995 Issued
Array ( [id] => 3894603 [patent_doc_number] => 05826044 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Display control system having a PCMCIA interface' [patent_app_type] => 1 [patent_app_number] => 8/458690 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 8165 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/826/05826044.pdf [firstpage_image] =>[orig_patent_app_number] => 458690 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/458690
Display control system having a PCMCIA interface Jun 1, 1995 Issued
Array ( [id] => 3877759 [patent_doc_number] => 05796960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Multi-media computer architecture' [patent_app_type] => 1 [patent_app_number] => 8/452318 [patent_app_country] => US [patent_app_date] => 1995-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6982 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796960.pdf [firstpage_image] =>[orig_patent_app_number] => 452318 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/452318
Multi-media computer architecture May 25, 1995 Issued
08/452240 EXTENSIBLE COMMUNICATION TYPE MANAGER FOR A COMPUTER SYSTEM May 25, 1995 Abandoned
Array ( [id] => 3767878 [patent_doc_number] => 05721907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Remote file transfer method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/445781 [patent_app_country] => US [patent_app_date] => 1995-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5706 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721907.pdf [firstpage_image] =>[orig_patent_app_number] => 445781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/445781
Remote file transfer method and apparatus May 21, 1995 Issued
Array ( [id] => 3849648 [patent_doc_number] => 05761464 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Prefetching variable length data' [patent_app_type] => 1 [patent_app_number] => 8/447088 [patent_app_country] => US [patent_app_date] => 1995-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5753 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761464.pdf [firstpage_image] =>[orig_patent_app_number] => 447088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/447088
Prefetching variable length data May 21, 1995 Issued
Array ( [id] => 1444024 [patent_doc_number] => 06496884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Microcomputer system with color coded components' [patent_app_type] => B1 [patent_app_number] => 08/437077 [patent_app_country] => US [patent_app_date] => 1995-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2929 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496884.pdf [firstpage_image] =>[orig_patent_app_number] => 08437077 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/437077
Microcomputer system with color coded components May 4, 1995 Issued
08/432622 DEADLOCK AVOIDANCE IN A SPLIT-BUS COMPUTER SYSTEM May 1, 1995 Abandoned
Array ( [id] => 3894573 [patent_doc_number] => 05799159 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Data processing apparatus, network system, and method of controlling the same' [patent_app_type] => 1 [patent_app_number] => 8/425794 [patent_app_country] => US [patent_app_date] => 1995-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 35 [patent_no_of_words] => 13452 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/799/05799159.pdf [firstpage_image] =>[orig_patent_app_number] => 425794 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/425794
Data processing apparatus, network system, and method of controlling the same Apr 19, 1995 Issued
Array ( [id] => 3670742 [patent_doc_number] => 05659762 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Method and device for rapidly restarting a computer system expansion device from a power save mode' [patent_app_type] => 1 [patent_app_number] => 8/423115 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 11223 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659762.pdf [firstpage_image] =>[orig_patent_app_number] => 423115 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/423115
Method and device for rapidly restarting a computer system expansion device from a power save mode Apr 16, 1995 Issued
08/422889 ARRANGEMENT FOR ELIMINATING MALFUNCTION AND/OR PERMITTING HIGH-SPEED TRANSMISSION IN A SERIAL BUS CONNECTION, AND TRANSMITTER AND RECEIVER UNITS LINKED TO THE LATTER Apr 16, 1995 Abandoned
Array ( [id] => 3716294 [patent_doc_number] => 05675750 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Interface having a bus master arbitrator for arbitrating occupation and release of a common bus between a host processor and a graphics system processor' [patent_app_type] => 1 [patent_app_number] => 8/418598 [patent_app_country] => US [patent_app_date] => 1995-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 17276 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675750.pdf [firstpage_image] =>[orig_patent_app_number] => 418598 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/418598
Interface having a bus master arbitrator for arbitrating occupation and release of a common bus between a host processor and a graphics system processor Apr 5, 1995 Issued
Array ( [id] => 3670651 [patent_doc_number] => 05659756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Method and system for providing access to logical partition information on a per resource basis' [patent_app_type] => 1 [patent_app_number] => 8/414088 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6943 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659756.pdf [firstpage_image] =>[orig_patent_app_number] => 414088 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414088
Method and system for providing access to logical partition information on a per resource basis Mar 30, 1995 Issued
Array ( [id] => 3788933 [patent_doc_number] => 05774745 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Method and apparatus for writing and reading entries in an event status queue of a host memory' [patent_app_type] => 1 [patent_app_number] => 8/414467 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3856 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774745.pdf [firstpage_image] =>[orig_patent_app_number] => 414467 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414467
Method and apparatus for writing and reading entries in an event status queue of a host memory Mar 30, 1995 Issued
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