
David B. Hardy
Examiner (ID: 1866)
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2826, 2508 |
| Total Applications | 965 |
| Issued Applications | 799 |
| Pending Applications | 23 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3952649
[patent_doc_number] => 05998818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-07
[patent_title] => 'Amplification type solid-state imaging device'
[patent_app_type] => 1
[patent_app_number] => 9/009681
[patent_app_country] => US
[patent_app_date] => 1998-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 20
[patent_no_of_words] => 11217
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/998/05998818.pdf
[firstpage_image] =>[orig_patent_app_number] => 009681
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/009681 | Amplification type solid-state imaging device | Jan 19, 1998 | Issued |
Array
(
[id] => 4108633
[patent_doc_number] => 06051876
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-18
[patent_title] => 'Semiconductor device with a graded passivation layer'
[patent_app_type] => 1
[patent_app_number] => 9/002651
[patent_app_country] => US
[patent_app_date] => 1998-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1713
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/051/06051876.pdf
[firstpage_image] =>[orig_patent_app_number] => 002651
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/002651 | Semiconductor device with a graded passivation layer | Jan 4, 1998 | Issued |
Array
(
[id] => 4161317
[patent_doc_number] => 06107669
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-22
[patent_title] => 'Load actuating semiconductor circuit having a thermally resistive member'
[patent_app_type] => 1
[patent_app_number] => 9/000851
[patent_app_country] => US
[patent_app_date] => 1997-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3508
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/107/06107669.pdf
[firstpage_image] =>[orig_patent_app_number] => 000851
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/000851 | Load actuating semiconductor circuit having a thermally resistive member | Dec 29, 1997 | Issued |
Array
(
[id] => 4057277
[patent_doc_number] => 05932910
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-03
[patent_title] => 'Flash memory cell structure having electrically isolated stacked gate'
[patent_app_type] => 1
[patent_app_number] => 8/998772
[patent_app_country] => US
[patent_app_date] => 1997-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 2488
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/932/05932910.pdf
[firstpage_image] =>[orig_patent_app_number] => 998772
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/998772 | Flash memory cell structure having electrically isolated stacked gate | Dec 28, 1997 | Issued |
Array
(
[id] => 4022092
[patent_doc_number] => 05907172
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-25
[patent_title] => 'Split-gate flash memory cell structure'
[patent_app_type] => 1
[patent_app_number] => 8/998312
[patent_app_country] => US
[patent_app_date] => 1997-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2190
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/907/05907172.pdf
[firstpage_image] =>[orig_patent_app_number] => 998312
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/998312 | Split-gate flash memory cell structure | Dec 23, 1997 | Issued |
Array
(
[id] => 4113387
[patent_doc_number] => 06057584
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-02
[patent_title] => 'Semiconductor device having a tri-layer gate insulating dielectric'
[patent_app_type] => 1
[patent_app_number] => 8/994302
[patent_app_country] => US
[patent_app_date] => 1997-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 25
[patent_no_of_words] => 5424
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/057/06057584.pdf
[firstpage_image] =>[orig_patent_app_number] => 994302
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/994302 | Semiconductor device having a tri-layer gate insulating dielectric | Dec 18, 1997 | Issued |
Array
(
[id] => 3939983
[patent_doc_number] => 05929469
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Contact holes of a different pitch in an application specific integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/992542
[patent_app_country] => US
[patent_app_date] => 1997-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 28
[patent_no_of_words] => 10120
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/929/05929469.pdf
[firstpage_image] =>[orig_patent_app_number] => 992542
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/992542 | Contact holes of a different pitch in an application specific integrated circuit | Dec 16, 1997 | Issued |
Array
(
[id] => 3980259
[patent_doc_number] => 05905273
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-18
[patent_title] => 'Quantum box information storage device'
[patent_app_type] => 1
[patent_app_number] => 8/988692
[patent_app_country] => US
[patent_app_date] => 1997-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 22
[patent_no_of_words] => 7297
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/905/05905273.pdf
[firstpage_image] =>[orig_patent_app_number] => 988692
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/988692 | Quantum box information storage device | Dec 10, 1997 | Issued |
Array
(
[id] => 4013789
[patent_doc_number] => 05889330
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-30
[patent_title] => 'Semiconductor device whose flattening resin film component has a controlled carbon atom content'
[patent_app_type] => 1
[patent_app_number] => 8/987763
[patent_app_country] => US
[patent_app_date] => 1997-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 17
[patent_no_of_words] => 10922
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/889/05889330.pdf
[firstpage_image] =>[orig_patent_app_number] => 987763
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/987763 | Semiconductor device whose flattening resin film component has a controlled carbon atom content | Dec 8, 1997 | Issued |
Array
(
[id] => 3999183
[patent_doc_number] => 05920106
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Semiconductor device and method for producing the same'
[patent_app_type] => 1
[patent_app_number] => 8/987500
[patent_app_country] => US
[patent_app_date] => 1997-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 22
[patent_no_of_words] => 5271
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/920/05920106.pdf
[firstpage_image] =>[orig_patent_app_number] => 987500
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/987500 | Semiconductor device and method for producing the same | Dec 8, 1997 | Issued |
Array
(
[id] => 3944332
[patent_doc_number] => 05973372
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Silicided shallow junction transistor formation and structure with high and low breakdown voltages'
[patent_app_type] => 1
[patent_app_number] => 8/986283
[patent_app_country] => US
[patent_app_date] => 1997-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 18
[patent_no_of_words] => 4037
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/973/05973372.pdf
[firstpage_image] =>[orig_patent_app_number] => 986283
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/986283 | Silicided shallow junction transistor formation and structure with high and low breakdown voltages | Dec 5, 1997 | Issued |
Array
(
[id] => 4299757
[patent_doc_number] => 06180974
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Semiconductor storage device having a capacitor electrode formed of at least a platinum-rhodium oxide'
[patent_app_type] => 1
[patent_app_number] => 8/986333
[patent_app_country] => US
[patent_app_date] => 1997-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 18000
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/180/06180974.pdf
[firstpage_image] =>[orig_patent_app_number] => 986333
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/986333 | Semiconductor storage device having a capacitor electrode formed of at least a platinum-rhodium oxide | Dec 4, 1997 | Issued |
Array
(
[id] => 3931978
[patent_doc_number] => 05952707
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Shallow trench isolation with thin nitride as gate dielectric'
[patent_app_type] => 1
[patent_app_number] => 8/986271
[patent_app_country] => US
[patent_app_date] => 1997-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2185
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/952/05952707.pdf
[firstpage_image] =>[orig_patent_app_number] => 986271
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/986271 | Shallow trench isolation with thin nitride as gate dielectric | Dec 4, 1997 | Issued |
Array
(
[id] => 3939173
[patent_doc_number] => 05939777
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-17
[patent_title] => 'High aspect ratio integrated circuit chip and method for producing the same'
[patent_app_type] => 1
[patent_app_number] => 8/986051
[patent_app_country] => US
[patent_app_date] => 1997-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2694
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/939/05939777.pdf
[firstpage_image] =>[orig_patent_app_number] => 986051
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/986051 | High aspect ratio integrated circuit chip and method for producing the same | Dec 4, 1997 | Issued |
Array
(
[id] => 4002940
[patent_doc_number] => 05923079
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Single-chip system having electrostatic discharge (ESD) protective circuitry including a single bipolar transistor portion'
[patent_app_type] => 1
[patent_app_number] => 8/969341
[patent_app_country] => US
[patent_app_date] => 1997-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3388
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/923/05923079.pdf
[firstpage_image] =>[orig_patent_app_number] => 969341
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/969341 | Single-chip system having electrostatic discharge (ESD) protective circuitry including a single bipolar transistor portion | Nov 27, 1997 | Issued |
Array
(
[id] => 3931631
[patent_doc_number] => 05952684
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Chip layout of semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/976604
[patent_app_country] => US
[patent_app_date] => 1997-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3104
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/952/05952684.pdf
[firstpage_image] =>[orig_patent_app_number] => 976604
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/976604 | Chip layout of semiconductor integrated circuit | Nov 23, 1997 | Issued |
Array
(
[id] => 3946972
[patent_doc_number] => 05981973
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Thin film transistor structure having increased on-current'
[patent_app_type] => 1
[patent_app_number] => 8/971986
[patent_app_country] => US
[patent_app_date] => 1997-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 38
[patent_no_of_words] => 10049
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/981/05981973.pdf
[firstpage_image] =>[orig_patent_app_number] => 971986
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/971986 | Thin film transistor structure having increased on-current | Nov 16, 1997 | Issued |
Array
(
[id] => 4176736
[patent_doc_number] => 06140690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-31
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/972060
[patent_app_country] => US
[patent_app_date] => 1997-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 10013
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/140/06140690.pdf
[firstpage_image] =>[orig_patent_app_number] => 972060
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/972060 | Semiconductor device | Nov 16, 1997 | Issued |
Array
(
[id] => 4410877
[patent_doc_number] => 06232643
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-15
[patent_title] => 'Memory using insulator traps'
[patent_app_type] => 1
[patent_app_number] => 8/969099
[patent_app_country] => US
[patent_app_date] => 1997-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4248
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/232/06232643.pdf
[firstpage_image] =>[orig_patent_app_number] => 969099
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/969099 | Memory using insulator traps | Nov 12, 1997 | Issued |
Array
(
[id] => 3766554
[patent_doc_number] => 05852313
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'Flash memory cell structure having a high gate-coupling coefficient and a select gate'
[patent_app_type] => 1
[patent_app_number] => 8/967940
[patent_app_country] => US
[patent_app_date] => 1997-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2571
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/852/05852313.pdf
[firstpage_image] =>[orig_patent_app_number] => 967940
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/967940 | Flash memory cell structure having a high gate-coupling coefficient and a select gate | Nov 11, 1997 | Issued |