Search

David B. Hardy

Examiner (ID: 15380)

Most Active Art Unit
2815
Art Unit(s)
2815, 2826, 2508
Total Applications
965
Issued Applications
799
Pending Applications
23
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4161188 [patent_doc_number] => 06107660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Vertical thin film transistor' [patent_app_type] => 1 [patent_app_number] => 9/314623 [patent_app_country] => US [patent_app_date] => 1999-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3072 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107660.pdf [firstpage_image] =>[orig_patent_app_number] => 314623 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/314623
Vertical thin film transistor May 18, 1999 Issued
Array ( [id] => 3949849 [patent_doc_number] => 05990504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Finger structured MOSFET' [patent_app_type] => 1 [patent_app_number] => 9/313281 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3458 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990504.pdf [firstpage_image] =>[orig_patent_app_number] => 313281 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313281
Finger structured MOSFET May 17, 1999 Issued
Array ( [id] => 4194892 [patent_doc_number] => 06153908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Buried-gate semiconductor device with improved level of integration' [patent_app_type] => 1 [patent_app_number] => 9/305212 [patent_app_country] => US [patent_app_date] => 1999-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 3682 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153908.pdf [firstpage_image] =>[orig_patent_app_number] => 305212 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/305212
Buried-gate semiconductor device with improved level of integration May 4, 1999 Issued
Array ( [id] => 4363703 [patent_doc_number] => 06169321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Method and system for locally annealing a microstructure formed on a substrate and device formed thereby' [patent_app_type] => 1 [patent_app_number] => 9/305513 [patent_app_country] => US [patent_app_date] => 1999-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2881 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169321.pdf [firstpage_image] =>[orig_patent_app_number] => 305513 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/305513
Method and system for locally annealing a microstructure formed on a substrate and device formed thereby May 4, 1999 Issued
Array ( [id] => 4191155 [patent_doc_number] => 06093972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Microelectronic package including a polymer encapsulated die' [patent_app_type] => 1 [patent_app_number] => 9/304152 [patent_app_country] => US [patent_app_date] => 1999-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3008 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/093/06093972.pdf [firstpage_image] =>[orig_patent_app_number] => 304152 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/304152
Microelectronic package including a polymer encapsulated die May 2, 1999 Issued
Array ( [id] => 4070429 [patent_doc_number] => 06008514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Double-crown shape capacitor with high-dielectric constant material' [patent_app_type] => 1 [patent_app_number] => 9/300638 [patent_app_country] => US [patent_app_date] => 1999-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 3919 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008514.pdf [firstpage_image] =>[orig_patent_app_number] => 300638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/300638
Double-crown shape capacitor with high-dielectric constant material Apr 26, 1999 Issued
Array ( [id] => 4144915 [patent_doc_number] => 06060726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'CMOS transistor with two channel regions and common gate' [patent_app_type] => 1 [patent_app_number] => 9/296491 [patent_app_country] => US [patent_app_date] => 1999-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2538 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060726.pdf [firstpage_image] =>[orig_patent_app_number] => 296491 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/296491
CMOS transistor with two channel regions and common gate Apr 21, 1999 Issued
Array ( [id] => 4152080 [patent_doc_number] => 06064099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Layout of well contacts and source contacts of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/285044 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 48 [patent_no_of_words] => 11290 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/064/06064099.pdf [firstpage_image] =>[orig_patent_app_number] => 285044 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285044
Layout of well contacts and source contacts of a semiconductor device Mar 31, 1999 Issued
09/282061 HIGH SPEED FLASH MEMORY WITH HIGH COUPLING RATIO Mar 28, 1999 Abandoned
Array ( [id] => 4299975 [patent_doc_number] => 06180990 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Hyperspectral radiation detector' [patent_app_type] => 1 [patent_app_number] => 9/277694 [patent_app_country] => US [patent_app_date] => 1999-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4389 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180990.pdf [firstpage_image] =>[orig_patent_app_number] => 277694 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/277694
Hyperspectral radiation detector Mar 25, 1999 Issued
Array ( [id] => 4243841 [patent_doc_number] => 06091104 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Flash memory cell with self-aligned gates and fabrication process' [patent_app_type] => 1 [patent_app_number] => 9/275670 [patent_app_country] => US [patent_app_date] => 1999-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 6253 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091104.pdf [firstpage_image] =>[orig_patent_app_number] => 275670 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/275670
Flash memory cell with self-aligned gates and fabrication process Mar 23, 1999 Issued
Array ( [id] => 4366266 [patent_doc_number] => 06255702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Semiconductor device having junction depths for reducing short channel effect' [patent_app_type] => 1 [patent_app_number] => 9/274973 [patent_app_country] => US [patent_app_date] => 1999-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 58 [patent_no_of_words] => 21990 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255702.pdf [firstpage_image] =>[orig_patent_app_number] => 274973 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/274973
Semiconductor device having junction depths for reducing short channel effect Mar 22, 1999 Issued
Array ( [id] => 4257552 [patent_doc_number] => 06208008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Integrated circuits having reduced stress in metallization' [patent_app_type] => 1 [patent_app_number] => 9/260702 [patent_app_country] => US [patent_app_date] => 1999-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 2353 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208008.pdf [firstpage_image] =>[orig_patent_app_number] => 260702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/260702
Integrated circuits having reduced stress in metallization Mar 1, 1999 Issued
Array ( [id] => 4238989 [patent_doc_number] => 06075260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Semiconductor integrated circuit device and method of arranging functional cell' [patent_app_type] => 1 [patent_app_number] => 9/258571 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5610 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075260.pdf [firstpage_image] =>[orig_patent_app_number] => 258571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258571
Semiconductor integrated circuit device and method of arranging functional cell Feb 25, 1999 Issued
Array ( [id] => 4424741 [patent_doc_number] => 06225676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Semiconductor device with improved inter-element isolation' [patent_app_type] => 1 [patent_app_number] => 9/252930 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3556 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225676.pdf [firstpage_image] =>[orig_patent_app_number] => 252930 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252930
Semiconductor device with improved inter-element isolation Feb 18, 1999 Issued
Array ( [id] => 4190456 [patent_doc_number] => 06160288 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Vertical type misfet having improved pressure resistance' [patent_app_type] => 1 [patent_app_number] => 9/252662 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 6763 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160288.pdf [firstpage_image] =>[orig_patent_app_number] => 252662 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252662
Vertical type misfet having improved pressure resistance Feb 18, 1999 Issued
Array ( [id] => 4179983 [patent_doc_number] => 06084288 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Hermetic chip and method of manufacture' [patent_app_type] => 1 [patent_app_number] => 9/244733 [patent_app_country] => US [patent_app_date] => 1999-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5015 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084288.pdf [firstpage_image] =>[orig_patent_app_number] => 244733 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/244733
Hermetic chip and method of manufacture Feb 4, 1999 Issued
Array ( [id] => 4101987 [patent_doc_number] => 06097086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Semiconductor chip carrier including an interconnect component interface' [patent_app_type] => 1 [patent_app_number] => 9/244435 [patent_app_country] => US [patent_app_date] => 1999-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 75 [patent_figures_cnt] => 99 [patent_no_of_words] => 22239 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097086.pdf [firstpage_image] =>[orig_patent_app_number] => 244435 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/244435
Semiconductor chip carrier including an interconnect component interface Feb 3, 1999 Issued
Array ( [id] => 4108134 [patent_doc_number] => 06100550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Circuit cell based semiconductor integrated circuit device and method of arrangement-interconnection therefor' [patent_app_type] => 1 [patent_app_number] => 9/241079 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 114 [patent_no_of_words] => 39283 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100550.pdf [firstpage_image] =>[orig_patent_app_number] => 241079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241079
Circuit cell based semiconductor integrated circuit device and method of arrangement-interconnection therefor Jan 31, 1999 Issued
Array ( [id] => 4179576 [patent_doc_number] => 06084261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'DRAM cell with a fork-shaped capacitor' [patent_app_type] => 1 [patent_app_number] => 9/232552 [patent_app_country] => US [patent_app_date] => 1999-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2483 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084261.pdf [firstpage_image] =>[orig_patent_app_number] => 232552 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/232552
DRAM cell with a fork-shaped capacitor Jan 17, 1999 Issued
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