
David B. Hardy
Examiner (ID: 1866)
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2826, 2508 |
| Total Applications | 965 |
| Issued Applications | 799 |
| Pending Applications | 23 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4038034
[patent_doc_number] => 05994746
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Memory cell configuration and method for its fabrication'
[patent_app_type] => 1
[patent_app_number] => 9/232083
[patent_app_country] => US
[patent_app_date] => 1999-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6332
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/994/05994746.pdf
[firstpage_image] =>[orig_patent_app_number] => 232083
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/232083 | Memory cell configuration and method for its fabrication | Jan 14, 1999 | Issued |
Array
(
[id] => 4139908
[patent_doc_number] => 06121671
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-19
[patent_title] => 'Semiconductor device having a substrate, an undoped silicon oxide structure, and an overlying doped silicon oxide structure with a side wall terminating at the undoped silicon oxide structure'
[patent_app_type] => 1
[patent_app_number] => 9/231346
[patent_app_country] => US
[patent_app_date] => 1999-01-13
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4564
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[patent_words_short_claim] => 73
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[pdf_file] => patents/06/121/06121671.pdf
[firstpage_image] =>[orig_patent_app_number] => 231346
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/231346 | Semiconductor device having a substrate, an undoped silicon oxide structure, and an overlying doped silicon oxide structure with a side wall terminating at the undoped silicon oxide structure | Jan 12, 1999 | Issued |
Array
(
[id] => 4132439
[patent_doc_number] => 06127708
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-03
[patent_title] => 'Semiconductor device having an intervening region between channel stopper and diffusion region'
[patent_app_type] => 1
[patent_app_number] => 9/228681
[patent_app_country] => US
[patent_app_date] => 1999-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 50
[patent_figures_cnt] => 73
[patent_no_of_words] => 5595
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[pdf_file] => patents/06/127/06127708.pdf
[firstpage_image] =>[orig_patent_app_number] => 228681
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/228681 | Semiconductor device having an intervening region between channel stopper and diffusion region | Jan 11, 1999 | Issued |
Array
(
[id] => 4137472
[patent_doc_number] => 06147376
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'DRAM cell arrangement and method for its production'
[patent_app_type] => 1
[patent_app_number] => 9/228611
[patent_app_country] => US
[patent_app_date] => 1999-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2946
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[pdf_file] => patents/06/147/06147376.pdf
[firstpage_image] =>[orig_patent_app_number] => 228611
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/228611 | DRAM cell arrangement and method for its production | Jan 11, 1999 | Issued |
Array
(
[id] => 4189562
[patent_doc_number] => 06150707
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Metal-to-metal capacitor having thin insulator'
[patent_app_type] => 1
[patent_app_number] => 9/226243
[patent_app_country] => US
[patent_app_date] => 1999-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1174
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/150/06150707.pdf
[firstpage_image] =>[orig_patent_app_number] => 226243
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/226243 | Metal-to-metal capacitor having thin insulator | Jan 6, 1999 | Issued |
Array
(
[id] => 4089736
[patent_doc_number] => 06163067
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-19
[patent_title] => 'Semiconductor apparatus having wiring groove and contact hole in self-alignment manner'
[patent_app_type] => 1
[patent_app_number] => 9/224173
[patent_app_country] => US
[patent_app_date] => 1998-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_no_of_words] => 11388
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[pdf_file] => patents/06/163/06163067.pdf
[firstpage_image] =>[orig_patent_app_number] => 224173
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224173 | Semiconductor apparatus having wiring groove and contact hole in self-alignment manner | Dec 30, 1998 | Issued |
Array
(
[id] => 4094916
[patent_doc_number] => 06133621
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-17
[patent_title] => 'Integrated shielded electric connection'
[patent_app_type] => 1
[patent_app_number] => 9/222643
[patent_app_country] => US
[patent_app_date] => 1998-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 1691
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/133/06133621.pdf
[firstpage_image] =>[orig_patent_app_number] => 222643
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/222643 | Integrated shielded electric connection | Dec 29, 1998 | Issued |
Array
(
[id] => 4189741
[patent_doc_number] => 06150720
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Semiconductor device having manufacturing wiring structure with buried plugs'
[patent_app_type] => 1
[patent_app_number] => 9/223534
[patent_app_country] => US
[patent_app_date] => 1998-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3618
[patent_no_of_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/150/06150720.pdf
[firstpage_image] =>[orig_patent_app_number] => 223534
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/223534 | Semiconductor device having manufacturing wiring structure with buried plugs | Dec 29, 1998 | Issued |
Array
(
[id] => 4101362
[patent_doc_number] => 06097048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-01
[patent_title] => 'Dynamic random access memory cell suitable for integration with semiconductor logic devices'
[patent_app_type] => 1
[patent_app_number] => 9/218303
[patent_app_country] => US
[patent_app_date] => 1998-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1957
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[pdf_file] => patents/06/097/06097048.pdf
[firstpage_image] =>[orig_patent_app_number] => 218303
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/218303 | Dynamic random access memory cell suitable for integration with semiconductor logic devices | Dec 21, 1998 | Issued |
Array
(
[id] => 4137408
[patent_doc_number] => 06147371
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Bipolar transistor and manufacturing method for same'
[patent_app_type] => 1
[patent_app_number] => 9/217061
[patent_app_country] => US
[patent_app_date] => 1998-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 20
[patent_no_of_words] => 6780
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[pdf_file] => patents/06/147/06147371.pdf
[firstpage_image] =>[orig_patent_app_number] => 217061
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/217061 | Bipolar transistor and manufacturing method for same | Dec 20, 1998 | Issued |
Array
(
[id] => 4239382
[patent_doc_number] => 06118171
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Semiconductor device having a pedestal structure and method of making'
[patent_app_type] => 1
[patent_app_number] => 9/217121
[patent_app_country] => US
[patent_app_date] => 1998-12-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/118/06118171.pdf
[firstpage_image] =>[orig_patent_app_number] => 217121
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/217121 | Semiconductor device having a pedestal structure and method of making | Dec 20, 1998 | Issued |
Array
(
[id] => 4243820
[patent_doc_number] => 06166408
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Hexagonally symmetric integrated circuit cell'
[patent_app_type] => 1
[patent_app_number] => 9/216251
[patent_app_country] => US
[patent_app_date] => 1998-12-18
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[pdf_file] => patents/06/166/06166408.pdf
[firstpage_image] =>[orig_patent_app_number] => 216251
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/216251 | Hexagonally symmetric integrated circuit cell | Dec 17, 1998 | Issued |
Array
(
[id] => 4187549
[patent_doc_number] => 06020647
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-01
[patent_title] => 'Composite metallization structures for improved post bonding reliability'
[patent_app_type] => 1
[patent_app_number] => 9/215902
[patent_app_country] => US
[patent_app_date] => 1998-12-18
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[pdf_file] => patents/06/020/06020647.pdf
[firstpage_image] =>[orig_patent_app_number] => 215902
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/215902 | Composite metallization structures for improved post bonding reliability | Dec 17, 1998 | Issued |
Array
(
[id] => 4360875
[patent_doc_number] => 06201263
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[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Semiconductor device'
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[pdf_file] => patents/06/201/06201263.pdf
[firstpage_image] =>[orig_patent_app_number] => 213421
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/213421 | Semiconductor device | Dec 16, 1998 | Issued |
Array
(
[id] => 3953471
[patent_doc_number] => 05998873
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[patent_kind] => NA
[patent_issue_date] => 1999-12-07
[patent_title] => 'Low contact resistance and low junction leakage metal interconnect contact structure'
[patent_app_type] => 1
[patent_app_number] => 9/213021
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[firstpage_image] =>[orig_patent_app_number] => 213021
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/213021 | Low contact resistance and low junction leakage metal interconnect contact structure | Dec 15, 1998 | Issued |
Array
(
[id] => 4411884
[patent_doc_number] => 06172411
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Self-aligned contact structures using high selectivity etching'
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[patent_app_number] => 9/208921
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[pdf_file] => patents/06/172/06172411.pdf
[firstpage_image] =>[orig_patent_app_number] => 208921
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/208921 | Self-aligned contact structures using high selectivity etching | Dec 9, 1998 | Issued |
Array
(
[id] => 3918075
[patent_doc_number] => 06002152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-14
[patent_title] => 'EEPROM with split gate source side injection with sidewall spacers'
[patent_app_type] => 1
[patent_app_number] => 9/207956
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[pdf_file] => patents/06/002/06002152.pdf
[firstpage_image] =>[orig_patent_app_number] => 207956
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/207956 | EEPROM with split gate source side injection with sidewall spacers | Dec 8, 1998 | Issued |
Array
(
[id] => 3944457
[patent_doc_number] => 05973380
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Semiconductor junction antifuse circuit'
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[firstpage_image] =>[orig_patent_app_number] => 206775
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/206775 | Semiconductor junction antifuse circuit | Dec 6, 1998 | Issued |
Array
(
[id] => 4009650
[patent_doc_number] => 06005285
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-21
[patent_title] => 'Argon doped epitaxial layers for inhibiting punchthrough within a semiconductor device'
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[pdf_file] => patents/06/005/06005285.pdf
[firstpage_image] =>[orig_patent_app_number] => 205321
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/205321 | Argon doped epitaxial layers for inhibiting punchthrough within a semiconductor device | Dec 3, 1998 | Issued |
Array
(
[id] => 4145687
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[patent_kind] => NA
[patent_issue_date] => 2000-05-09
[patent_title] => 'Semiconductor device with improved mounting on tape-shaped insulating substrate'
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[patent_app_number] => 9/205182
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/060/06060782.pdf
[firstpage_image] =>[orig_patent_app_number] => 205182
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/205182 | Semiconductor device with improved mounting on tape-shaped insulating substrate | Dec 3, 1998 | Issued |