Search

David B Springer

Examiner (ID: 6773)

Most Active Art Unit
1201
Art Unit(s)
1202, 2506, 1621, 1201, 1209, 2401, 1613, 1802
Total Applications
2063
Issued Applications
1774
Pending Applications
26
Abandoned Applications
263

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12612141 [patent_doc_number] => 20180095877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => PROCESSING SCATTERED DATA USING AN ADDRESS BUFFER [patent_app_type] => utility [patent_app_number] => 15/281288 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15281288 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/281288
PROCESSING SCATTERED DATA USING AN ADDRESS BUFFER Sep 29, 2016 Abandoned
Array ( [id] => 13173533 [patent_doc_number] => 10102886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Techniques for probabilistic dynamic random access memory row repair [patent_app_type] => utility [patent_app_number] => 15/269657 [patent_app_country] => US [patent_app_date] => 2016-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 10753 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15269657 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/269657
Techniques for probabilistic dynamic random access memory row repair Sep 18, 2016 Issued
Array ( [id] => 13679333 [patent_doc_number] => 20160378403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => SILENT STORE DETECTION AND RECORDING IN MEMORY STORAGE [patent_app_type] => utility [patent_app_number] => 15/245946 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 633 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245946 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245946
Silent store detection and recording in memory storage Aug 23, 2016 Issued
Array ( [id] => 12189775 [patent_doc_number] => 20180048711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'HIGH-PERFORMANCE KEY-VALUE STORE USING A COHERENT ATTACHED BUS' [patent_app_type] => utility [patent_app_number] => 15/235604 [patent_app_country] => US [patent_app_date] => 2016-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8607 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15235604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/235604
High-performance key-value store using a coherent attached bus Aug 11, 2016 Issued
Array ( [id] => 11131202 [patent_doc_number] => 20160328178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'Method, Computer, and Apparatus for Migrating Memory Data' [patent_app_type] => utility [patent_app_number] => 15/217608 [patent_app_country] => US [patent_app_date] => 2016-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 18532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15217608 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/217608
Method, computer, and apparatus for migrating memory data Jul 21, 2016 Issued
Array ( [id] => 12140107 [patent_doc_number] => 20180018190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'DELAYING PURGING OF STRUCTURES ASSOCIATED WITH ADDRESS TRANSLATION' [patent_app_type] => utility [patent_app_number] => 15/212360 [patent_app_country] => US [patent_app_date] => 2016-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15212360 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/212360
Delaying purging of structures associated with address translation Jul 17, 2016 Issued
Array ( [id] => 13157379 [patent_doc_number] => 10095413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Memory system with address translation between a logical address and a physical address [patent_app_type] => utility [patent_app_number] => 15/208725 [patent_app_country] => US [patent_app_date] => 2016-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 11906 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15208725 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/208725
Memory system with address translation between a logical address and a physical address Jul 12, 2016 Issued
Array ( [id] => 11938635 [patent_doc_number] => 20170242785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'Efficient Implementation of Optimized Host-Based Garbage Collection Strategies Using Xcopy and Arrays of Flash Devices' [patent_app_type] => utility [patent_app_number] => 15/208535 [patent_app_country] => US [patent_app_date] => 2016-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15794 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15208535 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/208535
Efficient Implementation of Optimized Host-Based Garbage Collection Strategies Using Xcopy and Arrays of Flash Devices Jul 11, 2016 Abandoned
Array ( [id] => 11938640 [patent_doc_number] => 20170242790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'Efficient Implementation of Optimized Host-Based Garbage Collection Strategies Using Xcopy and Multiple Logical Stripes' [patent_app_type] => utility [patent_app_number] => 15/208540 [patent_app_country] => US [patent_app_date] => 2016-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 17472 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15208540 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/208540
Efficient implementation of optimized host-based garbage collection strategies using xcopy and multiple logical stripes Jul 11, 2016 Issued
Array ( [id] => 13693261 [patent_doc_number] => 20170357585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => SETTING CACHE ENTRY AGE BASED ON HINTS FROM ANOTHER CACHE LEVEL [patent_app_type] => utility [patent_app_number] => 15/180828 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15180828 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/180828
SETTING CACHE ENTRY AGE BASED ON HINTS FROM ANOTHER CACHE LEVEL Jun 12, 2016 Abandoned
Array ( [id] => 13679279 [patent_doc_number] => 20160378376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => MANAGING STORAGE ARRAY CONFIGURATION [patent_app_type] => utility [patent_app_number] => 15/180438 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15180438 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/180438
Managing storage array configuration Jun 12, 2016 Issued
Array ( [id] => 13692983 [patent_doc_number] => 20170357446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => CACHE ENTRY REPLACEMENT BASED ON AVAILABILITY OF ENTRIES AT ANOTHER CACHE [patent_app_type] => utility [patent_app_number] => 15/180807 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15180807 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/180807
Cache entry replacement based on availability of entries at another cache Jun 12, 2016 Issued
Array ( [id] => 12933208 [patent_doc_number] => 09830277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Selective space reclamation of data storage memory employing heat and relocation metrics [patent_app_type] => utility [patent_app_number] => 15/175109 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4774 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175109 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175109
Selective space reclamation of data storage memory employing heat and relocation metrics Jun 6, 2016 Issued
Array ( [id] => 13004097 [patent_doc_number] => 10025717 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-17 [patent_title] => Multi-dimensional prefetching [patent_app_type] => utility [patent_app_number] => 15/166179 [patent_app_country] => US [patent_app_date] => 2016-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5354 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166179 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/166179
Multi-dimensional prefetching May 25, 2016 Issued
Array ( [id] => 11651360 [patent_doc_number] => 20170147261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'MEMORY SYSTEM AND OPERATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/157234 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 16162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15157234 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/157234
Memory system for controlling input command priority and operation method therefor May 16, 2016 Issued
Array ( [id] => 13738333 [patent_doc_number] => 20180373636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => MEMORY CONTROL DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/062860 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16062860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/062860
Memory control device and operating method thereof Mar 31, 2016 Issued
Array ( [id] => 11220462 [patent_doc_number] => 09448798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-20 [patent_title] => 'Silent store detection and recording in memory storage' [patent_app_type] => utility [patent_app_number] => 15/086974 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5843 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 616 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15086974 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/086974
Silent store detection and recording in memory storage Mar 30, 2016 Issued
Array ( [id] => 11062600 [patent_doc_number] => 20160259562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'Dynamic Cache Sharing Based on Power State' [patent_app_type] => utility [patent_app_number] => 15/066111 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2962 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15066111 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/066111
Dynamic cache sharing based on power state Mar 9, 2016 Issued
Array ( [id] => 16200547 [patent_doc_number] => 10725710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Hierarchical storage device, hierarchical storage control device, computer-readable recording medium having hierarchical storage control program recorded thereon, and hierarchical storage control method [patent_app_type] => utility [patent_app_number] => 15/065953 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10655 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 430 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065953 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/065953
Hierarchical storage device, hierarchical storage control device, computer-readable recording medium having hierarchical storage control program recorded thereon, and hierarchical storage control method Mar 9, 2016 Issued
Array ( [id] => 15854463 [patent_doc_number] => 10642514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Device and method for configuring expander configuration file of a storage system [patent_app_type] => utility [patent_app_number] => 16/061312 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3657 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16061312 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/061312
Device and method for configuring expander configuration file of a storage system Mar 1, 2016 Issued
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