David B. Thomas

Array ( [id] => 17175148 [patent_doc_number] => 20210328819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => ADAPTIVE ENERGY EFFICIENT ETHERNET [patent_app_type] => utility [patent_app_number] => 17/223843 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16979971 [patent_doc_number] => 20210224208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => Communications Interface Between Host System and State Machine [patent_app_type] => utility [patent_app_number] => 17/222783 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12725 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18234584 [patent_doc_number] => 11599141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Computing unit assembly and a method and a system for synchronizing computing units of an aircraft [patent_app_type] => utility [patent_app_number] => 17/222153 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4037 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18334904 [patent_doc_number] => 20230126852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => DATA TRANSMISSION APPARATUS AND METHOD [patent_app_type] => utility [patent_app_number] => 17/996171 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17996171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16921632 [patent_doc_number] => 20210194724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => INTELLIGENT CONTROLLER AND SENSOR NETWORK BUS, SYSTEM AND METHOD INCLUDING A FAILOVER MECHANISM [patent_app_type] => utility [patent_app_number] => 17/191961 [patent_app_country] => US [patent_app_date] => 2021-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 60509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -44 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18728022 [patent_doc_number] => 20230342315 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2023-10-26 [patent_title] => METHODS AND SYSTEMS FOR DEVICES WITH SELF-SELECTING BUS DECODER [patent_app_type] => utility [patent_app_number] => 17/184372 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18728022 [patent_doc_number] => 20230342315 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2023-10-26 [patent_title] => METHODS AND SYSTEMS FOR DEVICES WITH SELF-SELECTING BUS DECODER [patent_app_type] => utility [patent_app_number] => 17/184372 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18949635 [patent_doc_number] => 11892928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Delayed thermal throttling and associated data routing techniques [patent_app_type] => utility [patent_app_number] => 17/180659 [patent_app_country] => US [patent_app_date] => 2021-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17180659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18447609 [patent_doc_number] => 11683190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Wire fault and electrical imbalance detection for power over communications cabling [patent_app_type] => utility [patent_app_number] => 17/177027 [patent_app_country] => US [patent_app_date] => 2021-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4828 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177027 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16872287 [patent_doc_number] => 20210165754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => DATA PROCESSOR USING A RING BUS AND METHOD FOR CONTROLLING THE SAME [patent_app_type] => utility [patent_app_number] => 17/169708 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17877108 [patent_doc_number] => 11449121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Product detection device, product detection system and product detection method applied thereto [patent_app_type] => utility [patent_app_number] => 17/160226 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17160226 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17698746 [patent_doc_number] => 11372468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Power supply architecture for USB-C controllers [patent_app_type] => utility [patent_app_number] => 17/153084 [patent_app_country] => US [patent_app_date] => 2021-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17153084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18247921 [patent_doc_number] => 11604505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Processor security mode based memory operation management [patent_app_type] => utility [patent_app_number] => 17/136175 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 15398 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16812923 [patent_doc_number] => 20210135478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => WORKLOAD DEPENDENT LOAD-SHARING MECHANISM IN MULTI-BATTERY SYSTEM, AND ADAPTIVE CHARGING AND DISCHARGING FOR A HYBRID BATTERY [patent_app_type] => utility [patent_app_number] => 17/132771 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132771 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18741501 [patent_doc_number] => 20230350482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => REDUCED POWER CONSUMPTION BY MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/272055 [patent_app_country] => US [patent_app_date] => 2020-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17272055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17970152 [patent_doc_number] => 11487686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Bus system and method for allocating addresses to a plurality of bus subscribers in a bus system [patent_app_type] => utility [patent_app_number] => 17/124455 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17124455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17744405 [patent_doc_number] => 11392474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Electronic device for controlling interface between a plurality of integrated circuits and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/118071 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13019 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17659352 [patent_doc_number] => 20220179817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => SIGNAL BRIDGING USING AN UNPOPULATED PROCESSOR INTERCONNECT [patent_app_type] => utility [patent_app_number] => 17/115384 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115384 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16887604 [patent_doc_number] => 20210173801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => METHOD AND SYSTEM FOR HIGH INTEGRITY CAN BUS TRAFFIC SUPERVISION IN SAFETY CRITICAL APPLICATION [patent_app_type] => utility [patent_app_number] => 17/115460 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115460 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19167222 [patent_doc_number] => 11983127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Information processing system, information processing method, and information processing device to reduce load on an information processing unit [patent_app_type] => utility [patent_app_number] => 17/757215 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 13321 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17757215 [rel_patent_id] =>[rel_patent_doc_number] =>)