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David Clark

Examiner (ID: 3246)

Most Active Art Unit
2301
Art Unit(s)
2317, 2899, 2301, 2307, 2302
Total Applications
383
Issued Applications
245
Pending Applications
0
Abandoned Applications
138

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2601409 [patent_doc_number] => 04941086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-10 [patent_title] => 'Program controlled bus arbitration for a distributed array processing system' [patent_app_type] => 1 [patent_app_number] => 6/576303 [patent_app_country] => US [patent_app_date] => 1984-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4388 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/941/04941086.pdf [firstpage_image] =>[orig_patent_app_number] => 576303 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/576303
Program controlled bus arbitration for a distributed array processing system Feb 1, 1984 Issued
06/573132 SOUND GENERATION AND DISK SPEED CONTROL APPARATUS FOR USE WITH COMPUTER SYSTEMS Jan 19, 1984 Abandoned
Array ( [id] => 2671444 [patent_doc_number] => 04947316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'Internal bus architecture employing a simplified rapidly executable instruction set' [patent_app_type] => 1 [patent_app_number] => 6/566925 [patent_app_country] => US [patent_app_date] => 1983-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 16829 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947316.pdf [firstpage_image] =>[orig_patent_app_number] => 566925 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/566925
Internal bus architecture employing a simplified rapidly executable instruction set Dec 28, 1983 Issued
Array ( [id] => 2633274 [patent_doc_number] => 04956807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-11 [patent_title] => 'Watchdog timer' [patent_app_type] => 1 [patent_app_number] => 6/562011 [patent_app_country] => US [patent_app_date] => 1983-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2542 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/956/04956807.pdf [firstpage_image] =>[orig_patent_app_number] => 562011 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/562011
Watchdog timer Dec 15, 1983 Issued
06/560619 INTERACTIVE GRAPHIC SYSTEM Dec 11, 1983 Abandoned
06/554380 DATA PROCESSING SYSTEM WITH MULTIPLE MEMORIES AND PROGRAM COUNTER Nov 24, 1983 Abandoned
06/551555 METHOD AND DEVICE FOR PHONETICALLY ENCODING CHINESE TEXTUAL DATA PROCESSING ENTRY Nov 13, 1983 Abandoned
Array ( [id] => 2347635 [patent_doc_number] => 04661925 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-28 [patent_title] => 'Computer control memory apparatus providing variable microinstruction length' [patent_app_type] => 1 [patent_app_number] => 6/550270 [patent_app_country] => US [patent_app_date] => 1983-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4828 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 726 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/661/04661925.pdf [firstpage_image] =>[orig_patent_app_number] => 550270 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/550270
Computer control memory apparatus providing variable microinstruction length Nov 8, 1983 Issued
06/548122 POWER SUPPLY FOR A MOUSE Nov 1, 1983 Abandoned
Array ( [id] => 2421810 [patent_doc_number] => 04719592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-12 [patent_title] => 'Sequence generator' [patent_app_type] => 1 [patent_app_number] => 6/545519 [patent_app_country] => US [patent_app_date] => 1983-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2558 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/719/04719592.pdf [firstpage_image] =>[orig_patent_app_number] => 545519 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/545519
Sequence generator Oct 25, 1983 Issued
06/542933 APPARATUS AND METHOD FOR EFFECTING DYNAMIC ADDRESS TRANSLATION IN A MICROPROCESSOR IMPLEMENTED DATA PROCESSING SYSTEM Oct 17, 1983 Abandoned
06/541453 LOGICAL ARCHITECTURE IN A COMPUTER SYSTEM THAT PERMITS A CPU TO READ OR WRITE INTO ITS OWN MEMORY OR INTO ANOTHER MEMORY OR MEMORIES ACCESS TO WHICH IS CONTROLLED BY ANOTHER CPU OR CPUS Oct 12, 1983 Abandoned
06/535628 COMPUTER SYSTEM FOR PREVENTING COPYING OF PROGRAM Sep 25, 1983 Abandoned
Array ( [id] => 2716796 [patent_doc_number] => 04982360 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-01 [patent_title] => 'Memory subsystem' [patent_app_type] => 1 [patent_app_number] => 6/534927 [patent_app_country] => US [patent_app_date] => 1983-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 4 [patent_no_of_words] => 3093 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/982/04982360.pdf [firstpage_image] =>[orig_patent_app_number] => 534927 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/534927
Memory subsystem Sep 21, 1983 Issued
Array ( [id] => 2360935 [patent_doc_number] => 04688170 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-08-18 [patent_title] => 'Communications network for communicating with computers provided with disparate protocols' [patent_app_type] => 1 [patent_app_number] => 6/534687 [patent_app_country] => US [patent_app_date] => 1983-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2131 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/688/04688170.pdf [firstpage_image] =>[orig_patent_app_number] => 534687 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/534687
Communications network for communicating with computers provided with disparate protocols Sep 21, 1983 Issued
Array ( [id] => 2260141 [patent_doc_number] => 04590557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-05-20 [patent_title] => 'Method and apparatus for controlling software configurations in data processing systems' [patent_app_type] => 1 [patent_app_number] => 6/530931 [patent_app_country] => US [patent_app_date] => 1983-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2739 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/590/04590557.pdf [firstpage_image] =>[orig_patent_app_number] => 530931 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/530931
Method and apparatus for controlling software configurations in data processing systems Sep 11, 1983 Issued
Array ( [id] => 2226943 [patent_doc_number] => 04609996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-02 [patent_title] => 'Memory access system for a computer system adapted to accept a memory expansion module' [patent_app_type] => 1 [patent_app_number] => 6/522893 [patent_app_country] => US [patent_app_date] => 1983-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4350 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/609/04609996.pdf [firstpage_image] =>[orig_patent_app_number] => 522893 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/522893
Memory access system for a computer system adapted to accept a memory expansion module Aug 11, 1983 Issued
Array ( [id] => 2076018 [patent_doc_number] => 04463421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-07-31 [patent_title] => 'Serial/parallel input/output bus for microprocessor system' [patent_app_type] => 1 [patent_app_number] => 6/517383 [patent_app_country] => US [patent_app_date] => 1983-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 28 [patent_no_of_words] => 30973 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/463/04463421.pdf [firstpage_image] =>[orig_patent_app_number] => 517383 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/517383
Serial/parallel input/output bus for microprocessor system Jul 25, 1983 Issued
Array ( [id] => 2194108 [patent_doc_number] => 04546430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-10-08 [patent_title] => 'Control unit busy queuing' [patent_app_type] => 1 [patent_app_number] => 6/513051 [patent_app_country] => US [patent_app_date] => 1983-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 43 [patent_no_of_words] => 17403 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/546/04546430.pdf [firstpage_image] =>[orig_patent_app_number] => 513051 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/513051
Control unit busy queuing Jul 12, 1983 Issued
06/512696 MANUAL ENTRY RATE CALCULATOR HAVING CONTINUOUS UPDATING CAPABILITY Jul 10, 1983 Abandoned
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