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David D Chung

Examiner (ID: 18063)

Most Active Art Unit
2489
Art Unit(s)
2489
Total Applications
1
Issued Applications
0
Pending Applications
0
Abandoned Applications
1

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18297282 [patent_doc_number] => 20230106968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => WORKLOAD PRIORITIZATION FAIRNESS TECHNIQUES IN NON-VOLATILE MEMORY EXPRESS (NVMe) SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/494619 [patent_app_country] => US [patent_app_date] => 2021-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494619 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/494619
WORKLOAD PRIORITIZATION FAIRNESS TECHNIQUES IN NON-VOLATILE MEMORY EXPRESS (NVMe) SYSTEMS Oct 4, 2021 Pending
Array ( [id] => 18287218 [patent_doc_number] => 20230102690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => NEAR-MEMORY ENGINE FOR REDUCING BANDWIDTH UTILIZATION IN SPARSE DATA APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/490909 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490909 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490909
NEAR-MEMORY ENGINE FOR REDUCING BANDWIDTH UTILIZATION IN SPARSE DATA APPLICATIONS Sep 29, 2021 Pending
Array ( [id] => 17581020 [patent_doc_number] => 20220137875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => COMPUTING SYSTEM INCLUDING HOST AND STORAGE SYSTEM AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/490499 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490499 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490499
Computing system including host and storage system with preload buffer memory and method of operating the same Sep 29, 2021 Issued
Array ( [id] => 18285566 [patent_doc_number] => 20230101038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DETERMINISTIC MIXED LATENCY CACHE [patent_app_type] => utility [patent_app_number] => 17/489741 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489741 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489741
DETERMINISTIC MIXED LATENCY CACHE Sep 28, 2021 Pending
Array ( [id] => 18982397 [patent_doc_number] => 11907575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Memory controller and memory control method [patent_app_type] => utility [patent_app_number] => 17/483083 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8609 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483083 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483083
Memory controller and memory control method Sep 22, 2021 Issued
Array ( [id] => 17899098 [patent_doc_number] => 20220308760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => MEMORY SYSTEM AND METHOD OF OPERATING THE MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/473727 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473727 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473727
MEMORY SYSTEM AND METHOD OF OPERATING THE MEMORY SYSTEM Sep 12, 2021 Pending
Array ( [id] => 19506815 [patent_doc_number] => 12118236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Dynamically allocating memory controller resources for extended prefetching [patent_app_type] => utility [patent_app_number] => 17/446318 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4767 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446318 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446318
Dynamically allocating memory controller resources for extended prefetching Aug 29, 2021 Issued
Array ( [id] => 18934307 [patent_doc_number] => 11886741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Method and storage device for improving NAND flash memory performance for intensive read workloads [patent_app_type] => utility [patent_app_number] => 17/459539 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459539 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459539
Method and storage device for improving NAND flash memory performance for intensive read workloads Aug 26, 2021 Issued
Array ( [id] => 19107653 [patent_doc_number] => 11960762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Method for managing memory buffer and memory control circuit unit and memory storage apparatus thereof [patent_app_type] => utility [patent_app_number] => 17/400131 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 10522 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400131 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400131
Method for managing memory buffer and memory control circuit unit and memory storage apparatus thereof Aug 11, 2021 Issued
Array ( [id] => 18506253 [patent_doc_number] => 11704067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Performing multiple point table lookups in a single cycle in a system on chip [patent_app_type] => utility [patent_app_number] => 17/391378 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 61 [patent_no_of_words] => 58351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391378 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391378
Performing multiple point table lookups in a single cycle in a system on chip Aug 1, 2021 Issued
Array ( [id] => 18169920 [patent_doc_number] => 20230036531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => DYNAMICALLY ALLOCATED BUFFER POOLING [patent_app_type] => utility [patent_app_number] => 17/389272 [patent_app_country] => US [patent_app_date] => 2021-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/389272
Dynamically allocated buffer pooling Jul 28, 2021 Issued
Array ( [id] => 18386016 [patent_doc_number] => 11656797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Data storage device executing runt write commands as free commands [patent_app_type] => utility [patent_app_number] => 17/387638 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387638
Data storage device executing runt write commands as free commands Jul 27, 2021 Issued
Array ( [id] => 17187118 [patent_doc_number] => 20210334003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => PRIVATE SNAPSHOTS BASED ON SPARSE FILES AND DATA REPLICATION [patent_app_type] => utility [patent_app_number] => 17/372273 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 49979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372273 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/372273
PRIVATE SNAPSHOTS BASED ON SPARSE FILES AND DATA REPLICATION Jul 8, 2021 Abandoned
Array ( [id] => 17809350 [patent_doc_number] => 20220261185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/372053 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/372053
Memory system and operating method of memory system storing doorbell information in the buffer memory Jul 8, 2021 Issued
Array ( [id] => 18124902 [patent_doc_number] => 20230010516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => INPUT/OUTPUT (I/O) QUIESCING FOR SEQUENTIAL ORDERING OF OPERATIONS IN A WRITE-AHEAD-LOG (WAL)-BASED STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/368254 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368254 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368254
INPUT/OUTPUT (I/O) QUIESCING FOR SEQUENTIAL ORDERING OF OPERATIONS IN A WRITE-AHEAD-LOG (WAL)-BASED STORAGE SYSTEM Jul 5, 2021 Pending
Array ( [id] => 17172406 [patent_doc_number] => 20210326076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => UPDATING A REGISTER IN MEMORY [patent_app_type] => utility [patent_app_number] => 17/364569 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364569 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364569
Updating a register in memory Jun 29, 2021 Issued
Array ( [id] => 17751380 [patent_doc_number] => 20220229585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/362289 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362289
System and operating method thereof Jun 28, 2021 Issued
Array ( [id] => 17316848 [patent_doc_number] => 20210405897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => VIRTUAL ELASTIC QUEUE [patent_app_type] => utility [patent_app_number] => 17/352476 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352476
Virtual elastic queue Jun 20, 2021 Issued
Array ( [id] => 17260816 [patent_doc_number] => 20210373801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Manipulation of Data in a Memory [patent_app_type] => utility [patent_app_number] => 17/336701 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336701 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336701
Maintaining synchronisation between memory writing and reading blocks using an internal buffer and a control channel Jun 1, 2021 Issued
Array ( [id] => 18277816 [patent_doc_number] => 11616773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Server system and method for producing a protected configuration data file [patent_app_type] => utility [patent_app_number] => 17/327995 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/327995
Server system and method for producing a protected configuration data file May 23, 2021 Issued
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