David D Chung

Array ( [id] => 12167620 [patent_doc_number] => 09886389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Cache memory bypass in a multi-core processor (MCP)' [patent_app_type] => utility [patent_app_number] => 12/276072 [patent_app_country] => US [patent_app_date] => 2008-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2134 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12276072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5280491 [patent_doc_number] => 20090132623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'INFORMATION PROCESSING DEVICE HAVING DATA FIELD AND OPERATION METHODS OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/248957 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7631 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20090132623.pdf [firstpage_image] =>[orig_patent_app_number] => 12248957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10885472 [patent_doc_number] => 08909875 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-09 [patent_title] => 'Methods and apparatus for storing a new version of an object on a content addressable storage system' [patent_app_type] => utility [patent_app_number] => 12/241783 [patent_app_country] => US [patent_app_date] => 2008-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7155 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12241783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6312542 [patent_doc_number] => 20100070737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'ADDRESS GENERATION' [patent_app_type] => utility [patent_app_number] => 12/233320 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6654 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20100070737.pdf [firstpage_image] =>[orig_patent_app_number] => 12233320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6619620 [patent_doc_number] => 20100064107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'MICROPROCESSOR CACHE LINE EVICT ARRAY' [patent_app_type] => utility [patent_app_number] => 12/207261 [patent_app_country] => US [patent_app_date] => 2008-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6584 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20100064107.pdf [firstpage_image] =>[orig_patent_app_number] => 12207261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5442783 [patent_doc_number] => 20090094422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'ARCHIVING SYSTEM WITH PARTITIONS OF INDIVIDUAL ARCHIVES' [patent_app_type] => utility [patent_app_number] => 12/199264 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12963 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20090094422.pdf [firstpage_image] =>[orig_patent_app_number] => 12199264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5437690 [patent_doc_number] => 20090172277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'RAID LEVEL MIGRATION METHOD FOR PERFORMING ONLINE RAID LEVEL MIGRATION AND ADDING DISK TO DESTINATION RAID, AND ASSOCIATED SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/188176 [patent_app_country] => US [patent_app_date] => 2008-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2471 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172277.pdf [firstpage_image] =>[orig_patent_app_number] => 12188176 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9486473 [patent_doc_number] => 08732435 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-05-20 [patent_title] => 'Single buffer multi-channel de-interleaver/interleaver' [patent_app_type] => utility [patent_app_number] => 12/182961 [patent_app_country] => US [patent_app_date] => 2008-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12182961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9629873 [patent_doc_number] => 08799567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Method for accessing files in a management system' [patent_app_type] => utility [patent_app_number] => 12/168048 [patent_app_country] => US [patent_app_date] => 2008-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2196 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12168048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10562403 [patent_doc_number] => 09286080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Memory management for hypervisor loading' [patent_app_type] => utility [patent_app_number] => 12/217240 [patent_app_country] => US [patent_app_date] => 2008-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4159 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12217240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5311953 [patent_doc_number] => 20090019234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'CACHE MEMORY DEVICE AND DATA PROCESSING METHOD OF THE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/146950 [patent_app_country] => US [patent_app_date] => 2008-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5585 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20090019234.pdf [firstpage_image] =>[orig_patent_app_number] => 12146950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5467434 [patent_doc_number] => 20090327634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'SECURE CONFIGURATION OF TRANSIENT STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/145524 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4252 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20090327634.pdf [firstpage_image] =>[orig_patent_app_number] => 12145524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10841146 [patent_doc_number] => 08868844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'System and method for a software managed cache in a multiprocessing environment' [patent_app_type] => utility [patent_app_number] => 12/145551 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4327 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12145551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9326182 [patent_doc_number] => 08661219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Storage device control method and computer system' [patent_app_type] => utility [patent_app_number] => 12/146026 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 12871 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12146026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9251839 [patent_doc_number] => 08615630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-24 [patent_title] => 'Systems and methods for managing data storage' [patent_app_type] => utility [patent_app_number] => 12/145784 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6779 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12145784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4854512 [patent_doc_number] => 20080320255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'VARIOUS METHODS AND APPARATUS FOR CONFIGURABLE MAPPING OF ADDRESS REGIONS ONTO ONE OR MORE AGGREGATE TARGETS' [patent_app_type] => utility [patent_app_number] => 12/145257 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 36331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20080320255.pdf [firstpage_image] =>[orig_patent_app_number] => 12145257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5369896 [patent_doc_number] => 20090307455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'METHOD AND APPARATUS FOR ALLOCATING MEMORY FOR IMMUTABLE DATA ON A COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/136653 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20090307455.pdf [firstpage_image] =>[orig_patent_app_number] => 12136653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9218385 [patent_doc_number] => 08631195 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-14 [patent_title] => 'Content addressable memory having selectively interconnected shift register circuits' [patent_app_type] => utility [patent_app_number] => 12/132053 [patent_app_country] => US [patent_app_date] => 2008-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 35 [patent_no_of_words] => 32774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12132053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5571316 [patent_doc_number] => 20090254695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'STORAGE SYSTEM COMPRISING PLURALITY OF STORAGE SYSTEM MODULES' [patent_app_type] => utility [patent_app_number] => 12/130071 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 20014 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254695.pdf [firstpage_image] =>[orig_patent_app_number] => 12130071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6363352 [patent_doc_number] => 20100250837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'Method for Addressing Page-Oriented Non-Volatile Memories' [patent_app_type] => utility [patent_app_number] => 12/742033 [patent_app_country] => US [patent_app_date] => 2008-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1539 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20100250837.pdf [firstpage_image] =>[orig_patent_app_number] => 12742033 [rel_patent_id] =>[rel_patent_doc_number] =>)