Search

David D. Mattison

Examiner (ID: 4009, Phone: (303)297-4243 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2842, 2849
Total Applications
367
Issued Applications
316
Pending Applications
1
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18991850 [patent_doc_number] => 20240063819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => ITERATIVE DECODER WITH A DYNAMIC MAXIMUM STOP CONDITION [patent_app_type] => utility [patent_app_number] => 17/890978 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890978 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890978
Iterative decoder with a dynamic maximum stop condition Aug 17, 2022 Issued
Array ( [id] => 18936050 [patent_doc_number] => 11888500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Encoding circuit, decoding circuit, and decoding method [patent_app_type] => utility [patent_app_number] => 17/888059 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 16918 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17888059 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/888059
Encoding circuit, decoding circuit, and decoding method Aug 14, 2022 Issued
Array ( [id] => 19092535 [patent_doc_number] => 11953984 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-09 [patent_title] => Systems and methods for blockchain repair assurance tokens [patent_app_type] => utility [patent_app_number] => 17/886365 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8091 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886365
Systems and methods for blockchain repair assurance tokens Aug 10, 2022 Issued
Array ( [id] => 18528548 [patent_doc_number] => 11715546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Memory array test method and system [patent_app_type] => utility [patent_app_number] => 17/884634 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 13732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884634 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884634
Memory array test method and system Aug 9, 2022 Issued
Array ( [id] => 18858060 [patent_doc_number] => 11855658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-26 [patent_title] => Efficient hard decision decoding of generalized Reed-Solomon codes in presence of erasures and errors within the singleton bound [patent_app_type] => utility [patent_app_number] => 17/882306 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9458 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882306
Efficient hard decision decoding of generalized Reed-Solomon codes in presence of erasures and errors within the singleton bound Aug 4, 2022 Issued
Array ( [id] => 18223945 [patent_doc_number] => 20230062939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => MANAGING ERROR CONTROL INFORMATION USING A REGISTER [patent_app_type] => utility [patent_app_number] => 17/816320 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816320 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/816320
Managing error control information using a register Jul 28, 2022 Issued
Array ( [id] => 18782778 [patent_doc_number] => 11824556 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-11-21 [patent_title] => Error correction using soft decision bits and multiple hypotheses [patent_app_type] => utility [patent_app_number] => 17/873066 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4669 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873066 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873066
Error correction using soft decision bits and multiple hypotheses Jul 24, 2022 Issued
Array ( [id] => 18927934 [patent_doc_number] => 20240030938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => MEMORY DEVICE, ERROR CORRECTION DEVICE AND ERROR CORRECTION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/868251 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868251
Memory device, error correction device and error correction method thereof Jul 18, 2022 Issued
Array ( [id] => 18734707 [patent_doc_number] => 11803437 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-31 [patent_title] => Write hardware training acceleration [patent_app_type] => utility [patent_app_number] => 17/854988 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854988
Write hardware training acceleration Jun 29, 2022 Issued
Array ( [id] => 18608735 [patent_doc_number] => 11750222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-05 [patent_title] => Throughput efficient Reed-Solomon forward error correction decoding [patent_app_type] => utility [patent_app_number] => 17/809715 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 16320 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809715 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809715
Throughput efficient Reed-Solomon forward error correction decoding Jun 28, 2022 Issued
Array ( [id] => 18608732 [patent_doc_number] => 11750219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Decoding method, decoder, and decoding apparatus [patent_app_type] => utility [patent_app_number] => 17/852218 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 11702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852218
Decoding method, decoder, and decoding apparatus Jun 27, 2022 Issued
Array ( [id] => 18577574 [patent_doc_number] => 11734106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Memory repair method and apparatus based on error code tracking [patent_app_type] => utility [patent_app_number] => 17/852272 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5028 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852272
Memory repair method and apparatus based on error code tracking Jun 27, 2022 Issued
Array ( [id] => 19669666 [patent_doc_number] => 12182415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Encoding system data in parity symbols [patent_app_type] => utility [patent_app_number] => 17/848774 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848774 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848774
Encoding system data in parity symbols Jun 23, 2022 Issued
Array ( [id] => 18951616 [patent_doc_number] => 11894926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Interleaved forward error correction over multiple transport channels [patent_app_type] => utility [patent_app_number] => 17/845638 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5187 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845638
Interleaved forward error correction over multiple transport channels Jun 20, 2022 Issued
Array ( [id] => 18797492 [patent_doc_number] => 11831338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Systems and methods for improving communication throughput [patent_app_type] => utility [patent_app_number] => 17/843698 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6951 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843698 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843698
Systems and methods for improving communication throughput Jun 16, 2022 Issued
Array ( [id] => 18720037 [patent_doc_number] => 11797382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Semiconductor memory device, semiconductor memory system including the same, method of driving the semiconductor memory system [patent_app_type] => utility [patent_app_number] => 17/841044 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 29 [patent_no_of_words] => 9320 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841044 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841044
Semiconductor memory device, semiconductor memory system including the same, method of driving the semiconductor memory system Jun 14, 2022 Issued
Array ( [id] => 17887452 [patent_doc_number] => 20220302930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SYSTEMS AND METHODS FOR INTERLEAVED HAMMING ENCODING AND DECODING [patent_app_type] => utility [patent_app_number] => 17/832785 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6720 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832785 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832785
Communication device with interleaved encoding for FEC encoded data streams Jun 5, 2022 Issued
Array ( [id] => 19199603 [patent_doc_number] => 11996860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Scaled bit flip thresholds across columns for irregular low density parity check decoding [patent_app_type] => utility [patent_app_number] => 17/829924 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829924 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829924
Scaled bit flip thresholds across columns for irregular low density parity check decoding May 31, 2022 Issued
Array ( [id] => 18890842 [patent_doc_number] => 11869619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Systems and methods of reducing detection error and duty error in memory devices [patent_app_type] => utility [patent_app_number] => 17/828708 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 22778 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828708 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/828708
Systems and methods of reducing detection error and duty error in memory devices May 30, 2022 Issued
Array ( [id] => 19475500 [patent_doc_number] => 12105588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Adjusting error encoding parameters for writing encoded data slices [patent_app_type] => utility [patent_app_number] => 17/804483 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 87 [patent_no_of_words] => 60056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804483
Adjusting error encoding parameters for writing encoded data slices May 26, 2022 Issued
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