Search

David D. Mattison

Examiner (ID: 14714, Phone: (303)297-4243 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2849, 2842
Total Applications
367
Issued Applications
316
Pending Applications
1
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10965222 [patent_doc_number] => 20140368254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'GATE DRIVER, SWITCH CONTROL CIRCUIT AND POWER SUPPLY DEVICE COMPRISING THE GATE DRIVER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/301970 [patent_app_country] => US [patent_app_date] => 2014-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9816 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14301970 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/301970
Gate driver, switch control circuit and power supply device comprising the gate driver circuit Jun 10, 2014 Issued
Array ( [id] => 10958797 [patent_doc_number] => 20140361822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'FINE PULSE GENERATOR AND METHOD FOR GENERATING FINE PULSE' [patent_app_type] => utility [patent_app_number] => 14/300348 [patent_app_country] => US [patent_app_date] => 2014-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3522 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14300348 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/300348
Fine pulse generator and method for generating fine pulse Jun 9, 2014 Issued
Array ( [id] => 10472998 [patent_doc_number] => 20150358015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'Constant Impedance Switch' [patent_app_type] => utility [patent_app_number] => 14/297598 [patent_app_country] => US [patent_app_date] => 2014-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14297598 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/297598
Constant impedance switch Jun 4, 2014 Issued
Array ( [id] => 10958792 [patent_doc_number] => 20140361817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'PHASE-LOCKED LOOP DEVICE WITH SYNCHRONIZATION MEANS' [patent_app_type] => utility [patent_app_number] => 14/296632 [patent_app_country] => US [patent_app_date] => 2014-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5613 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14296632 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/296632
Phase-locked loop device with synchronization means Jun 4, 2014 Issued
Array ( [id] => 10951322 [patent_doc_number] => 20140354343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'ANALOG INTEGRATOR SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/296137 [patent_app_country] => US [patent_app_date] => 2014-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12659 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14296137 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/296137
Analog integrator system and method Jun 3, 2014 Issued
Array ( [id] => 11358525 [patent_doc_number] => 09535172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-03 [patent_title] => 'Methods and apparatuses for adaptively determining voltage reset timing' [patent_app_type] => utility [patent_app_number] => 14/288818 [patent_app_country] => US [patent_app_date] => 2014-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288818 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288818
Methods and apparatuses for adaptively determining voltage reset timing May 27, 2014 Issued
Array ( [id] => 10270864 [patent_doc_number] => 20150155861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/286725 [patent_app_country] => US [patent_app_date] => 2014-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14286725 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/286725
Semiconductor device and semiconductor system including the same May 22, 2014 Issued
Array ( [id] => 10456011 [patent_doc_number] => 20150341026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'TRANSISTOR BASED SWITCH STACK HAVING FILTERS FOR PRESERVING AC EQUIPOTENTIAL NODES' [patent_app_type] => utility [patent_app_number] => 14/281965 [patent_app_country] => US [patent_app_date] => 2014-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 22043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281965 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/281965
Transistor based switch stack having filters for preserving AC equipotential nodes May 19, 2014 Issued
Array ( [id] => 10446030 [patent_doc_number] => 20150331044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'SCAN FLIP-FLOP CIRCUIT WITH LOS SCAN ENABLE SIGNAL' [patent_app_type] => utility [patent_app_number] => 14/280670 [patent_app_country] => US [patent_app_date] => 2014-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8801 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14280670 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/280670
Scan flip-flop circuit with LOS scan enable signal May 18, 2014 Issued
Array ( [id] => 10645994 [patent_doc_number] => 09362877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Electronic component, information processing apparatus, and electronic component control method' [patent_app_type] => utility [patent_app_number] => 14/275111 [patent_app_country] => US [patent_app_date] => 2014-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 11115 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14275111 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/275111
Electronic component, information processing apparatus, and electronic component control method May 11, 2014 Issued
Array ( [id] => 10107335 [patent_doc_number] => 09143122 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-22 [patent_title] => 'Adaptive low skew clocking architecture' [patent_app_type] => utility [patent_app_number] => 14/268671 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7567 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268671 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268671
Adaptive low skew clocking architecture May 1, 2014 Issued
Array ( [id] => 11765600 [patent_doc_number] => 09374072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-21 [patent_title] => 'Post fabrication tuning of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/268336 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 6388 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268336 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268336
Post fabrication tuning of an integrated circuit May 1, 2014 Issued
Array ( [id] => 11188170 [patent_doc_number] => 09419590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Low power toggle latch-based flip-flop including integrated clock gating logic' [patent_app_type] => utility [patent_app_number] => 14/267883 [patent_app_country] => US [patent_app_date] => 2014-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8471 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14267883 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/267883
Low power toggle latch-based flip-flop including integrated clock gating logic Apr 30, 2014 Issued
Array ( [id] => 10125921 [patent_doc_number] => 09160297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Common mode filter' [patent_app_type] => utility [patent_app_number] => 14/255376 [patent_app_country] => US [patent_app_date] => 2014-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3112 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14255376 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/255376
Common mode filter Apr 16, 2014 Issued
Array ( [id] => 11446897 [patent_doc_number] => 20170047917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'SIGNAL DELAY CELLS' [patent_app_type] => utility [patent_app_number] => 15/304491 [patent_app_country] => US [patent_app_date] => 2014-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12801 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15304491 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/304491
SIGNAL DELAY CELLS Apr 15, 2014 Abandoned
Array ( [id] => 10903765 [patent_doc_number] => 20140306778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-16 [patent_title] => 'MINIATURE RADIO FREQUENCY DIRECTIONAL COUPLER FOR CELLULAR APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 14/251197 [patent_app_country] => US [patent_app_date] => 2014-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5932 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14251197 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/251197
Miniature radio frequency directional coupler for cellular applications Apr 10, 2014 Issued
Array ( [id] => 10903767 [patent_doc_number] => 20140306780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-16 [patent_title] => 'Duplexers' [patent_app_type] => utility [patent_app_number] => 14/250506 [patent_app_country] => US [patent_app_date] => 2014-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7711 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14250506 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/250506
Duplexers Apr 10, 2014 Abandoned
Array ( [id] => 10042515 [patent_doc_number] => 09083234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Drive output harmonic mitigation devices and methods of use thereof' [patent_app_type] => utility [patent_app_number] => 14/249043 [patent_app_country] => US [patent_app_date] => 2014-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3283 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249043 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/249043
Drive output harmonic mitigation devices and methods of use thereof Apr 8, 2014 Issued
Array ( [id] => 13641639 [patent_doc_number] => 09847785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-19 [patent_title] => Phase locked loop circuit and method of frequency adjustment of injection locked frequency divider [patent_app_type] => utility [patent_app_number] => 15/111701 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3627 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15111701 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/111701
Phase locked loop circuit and method of frequency adjustment of injection locked frequency divider Mar 12, 2014 Issued
Array ( [id] => 10591234 [patent_doc_number] => 09312857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Semiconductor circuit' [patent_app_type] => utility [patent_app_number] => 14/208053 [patent_app_country] => US [patent_app_date] => 2014-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10031 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14208053 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/208053
Semiconductor circuit Mar 12, 2014 Issued
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