
David D. Mattison
Examiner (ID: 5349, Phone: (303)297-4243 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2842, 2849 |
| Total Applications | 367 |
| Issued Applications | 316 |
| Pending Applications | 1 |
| Abandoned Applications | 52 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16586723
[patent_doc_number] => 20210021125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-21
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/883282
[patent_app_country] => US
[patent_app_date] => 2020-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5931
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883282
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/883282 | Semiconductor device | May 25, 2020 | Issued |
Array
(
[id] => 17310696
[patent_doc_number] => 11211824
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-28
[patent_title] => Wireless power transmitting and charging system
[patent_app_type] => utility
[patent_app_number] => 16/841325
[patent_app_country] => US
[patent_app_date] => 2020-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 11921
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841325
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/841325 | Wireless power transmitting and charging system | Apr 5, 2020 | Issued |
Array
(
[id] => 17145981
[patent_doc_number] => 20210313994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => LOCKED LOOP CIRCUIT AND METHOD WITH MULTI-PHASE SYNCHRONIZATION
[patent_app_type] => utility
[patent_app_number] => 16/840642
[patent_app_country] => US
[patent_app_date] => 2020-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3344
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840642
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/840642 | Locked loop circuit and method with multi-phase synchronization | Apr 5, 2020 | Issued |
Array
(
[id] => 16774616
[patent_doc_number] => 10985742
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-20
[patent_title] => Operation method of signal receiver, pulse width controller, and electronic device including the same
[patent_app_type] => utility
[patent_app_number] => 16/811325
[patent_app_country] => US
[patent_app_date] => 2020-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 26
[patent_no_of_words] => 14933
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811325
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/811325 | Operation method of signal receiver, pulse width controller, and electronic device including the same | Mar 5, 2020 | Issued |
Array
(
[id] => 16944707
[patent_doc_number] => 11056965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-06
[patent_title] => Gate driver and power converter
[patent_app_type] => utility
[patent_app_number] => 16/797202
[patent_app_country] => US
[patent_app_date] => 2020-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6628
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 336
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16797202
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/797202 | Gate driver and power converter | Feb 20, 2020 | Issued |
Array
(
[id] => 16002605
[patent_doc_number] => 20200177173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-04
[patent_title] => SYSTEM AND METHOD FOR FAST CONVERGING REFERENCE CLOCK DUTY CYCLE CORRECTION FOR DIGITAL TO TIME CONVERTER (DTC)-BASED ANALOG FRACTIONAL-N PHASE-LOCKED LOOP (PLL)
[patent_app_type] => utility
[patent_app_number] => 16/786364
[patent_app_country] => US
[patent_app_date] => 2020-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16786364
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/786364 | System and method for fast converging reference clock duty cycle correction for digital to time converter (DTC)-based analog fractional-N phase-locked loop (PLL) | Feb 9, 2020 | Issued |
Array
(
[id] => 15971007
[patent_doc_number] => 20200169255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-28
[patent_title] => SINGLE-POLE DOUBLE-THROW SWITCH
[patent_app_type] => utility
[patent_app_number] => 16/692214
[patent_app_country] => US
[patent_app_date] => 2019-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4381
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 308
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692214
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/692214 | Single-pole double-throw switch | Nov 21, 2019 | Issued |
Array
(
[id] => 17122520
[patent_doc_number] => 11133669
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-09-28
[patent_title] => Adjustable power limiter with integrated power detector
[patent_app_type] => utility
[patent_app_number] => 16/580886
[patent_app_country] => US
[patent_app_date] => 2019-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 6731
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16580886
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/580886 | Adjustable power limiter with integrated power detector | Sep 23, 2019 | Issued |
Array
(
[id] => 17071418
[patent_doc_number] => 20210273635
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => DETERMINING AN OPERATING CONDITION OF A TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/276850
[patent_app_country] => US
[patent_app_date] => 2019-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3263
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17276850
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/276850 | DETERMINING AN OPERATING CONDITION OF A TRANSISTOR | Sep 18, 2019 | Abandoned |
Array
(
[id] => 15301461
[patent_doc_number] => 20190393866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-26
[patent_title] => LEVEL-SHIFTING CIRCUIT CONFIGURED TO LIMIT LEAKAGE CURRENT
[patent_app_type] => utility
[patent_app_number] => 16/562793
[patent_app_country] => US
[patent_app_date] => 2019-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5861
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562793
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/562793 | Level-shifting circuit configured to limit leakage current | Sep 5, 2019 | Issued |
Array
(
[id] => 16881764
[patent_doc_number] => 11031928
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-08
[patent_title] => Semiconductor integrated circuit and transmission device
[patent_app_type] => utility
[patent_app_number] => 16/557016
[patent_app_country] => US
[patent_app_date] => 2019-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4846
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557016
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/557016 | Semiconductor integrated circuit and transmission device | Aug 29, 2019 | Issued |
Array
(
[id] => 15626941
[patent_doc_number] => 20200083875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => MASTER READ FROM SLAVE OVER PULSE-WIDTH MODULATED HALF-DUPLEX 1-WIRE BUS
[patent_app_type] => utility
[patent_app_number] => 16/556835
[patent_app_country] => US
[patent_app_date] => 2019-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13144
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556835
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/556835 | MASTER READ FROM SLAVE OVER PULSE-WIDTH MODULATED HALF-DUPLEX 1-WIRE BUS | Aug 29, 2019 | Abandoned |
Array
(
[id] => 16433571
[patent_doc_number] => 10833674
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-10
[patent_title] => Switch device with input limiting function
[patent_app_type] => utility
[patent_app_number] => 16/554652
[patent_app_country] => US
[patent_app_date] => 2019-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3937
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554652
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/554652 | Switch device with input limiting function | Aug 28, 2019 | Issued |
Array
(
[id] => 16280782
[patent_doc_number] => 10763827
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-09-01
[patent_title] => Delay line with controllable phase-shifting cells
[patent_app_type] => utility
[patent_app_number] => 16/555443
[patent_app_country] => US
[patent_app_date] => 2019-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4874
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555443
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/555443 | Delay line with controllable phase-shifting cells | Aug 28, 2019 | Issued |
Array
(
[id] => 15599783
[patent_doc_number] => 20200076426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-05
[patent_title] => GaN DRIVER USING ACTIVE PRE-DRIVER WITH FEEDBACK
[patent_app_type] => utility
[patent_app_number] => 16/553650
[patent_app_country] => US
[patent_app_date] => 2019-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4131
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553650
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/553650 | GaN driver using active pre-driver with feedback | Aug 27, 2019 | Issued |
Array
(
[id] => 16339839
[patent_doc_number] => 10790811
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-29
[patent_title] => Cascaded bootstrapping GaN power switch and driver
[patent_app_type] => utility
[patent_app_number] => 16/553335
[patent_app_country] => US
[patent_app_date] => 2019-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5560
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553335
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/553335 | Cascaded bootstrapping GaN power switch and driver | Aug 27, 2019 | Issued |
Array
(
[id] => 16317006
[patent_doc_number] => 20200295744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-17
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/551975
[patent_app_country] => US
[patent_app_date] => 2019-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3390
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16551975
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/551975 | Semiconductor integrated circuit | Aug 26, 2019 | Issued |
Array
(
[id] => 16448968
[patent_doc_number] => 10840903
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-17
[patent_title] => Semiconductor module
[patent_app_type] => utility
[patent_app_number] => 16/548398
[patent_app_country] => US
[patent_app_date] => 2019-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 24
[patent_no_of_words] => 8780
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548398
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/548398 | Semiconductor module | Aug 21, 2019 | Issued |
Array
(
[id] => 16180124
[patent_doc_number] => 20200227093
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-16
[patent_title] => REVERSE BIAS VOLTAGE ADJUSTER
[patent_app_type] => utility
[patent_app_number] => 16/543629
[patent_app_country] => US
[patent_app_date] => 2019-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5009
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543629
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/543629 | Reverse bias voltage adjuster | Aug 18, 2019 | Issued |
Array
(
[id] => 17194534
[patent_doc_number] => 11163286
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-02
[patent_title] => Monitoring system control technology
[patent_app_type] => utility
[patent_app_number] => 16/538447
[patent_app_country] => US
[patent_app_date] => 2019-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 12994
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538447
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/538447 | Monitoring system control technology | Aug 11, 2019 | Issued |