Search

David D. Mattison

Examiner (ID: 5349, Phone: (303)297-4243 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2842, 2849
Total Applications
367
Issued Applications
316
Pending Applications
1
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14574737 [patent_doc_number] => 20190214976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => SYSTEM AND METHOD FOR FAST CONVERGING REFERENCE CLOCK DUTY CYCLE CORRECTION FOR DIGITAL TO TIME CONVERTER (DTC)-BASED ANALOG FRACTIONAL-N PHASE-LOCKED LOOP (PLL) [patent_app_type] => utility [patent_app_number] => 16/019070 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16019070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/019070
System and method for fast converging reference clock duty cycle correction for digital to time converter (DTC)-based analog fractional-N phase-locked loop (PLL) Jun 25, 2018 Issued
Array ( [id] => 13782045 [patent_doc_number] => 20190004561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => DIRECT DIGITAL SYNTHESIS SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/019472 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16019472 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/019472
Direct digital synthesis systems and methods Jun 25, 2018 Issued
Array ( [id] => 14905915 [patent_doc_number] => 20190296723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => RECEIVER-SIDE SETUP AND HOLD TIME CALIBRATION FOR SOURCE SYNCHRONOUS SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/017286 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/017286
Receiver-side setup and hold time calibration for source synchronous systems Jun 24, 2018 Issued
Array ( [id] => 15079123 [patent_doc_number] => 10469064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Power converter [patent_app_type] => utility [patent_app_number] => 16/016896 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9965 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016896 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016896
Power converter Jun 24, 2018 Issued
Array ( [id] => 14220669 [patent_doc_number] => 20190122719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/013307 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7257 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013307 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013307
Semiconductor device and semiconductor system using the same Jun 19, 2018 Issued
Array ( [id] => 13741917 [patent_doc_number] => 20180375428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => NEGATIVE CHARGE PUMP CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/012410 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012410
Negative charge pump circuit Jun 18, 2018 Issued
Array ( [id] => 16859028 [patent_doc_number] => 20210159773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => METHOD FOR CONTROLLING RESONANT POWER CONVERSION DEVICE, AND RESONANT POWER CONVERSION DEVICE [patent_app_type] => utility [patent_app_number] => 17/048685 [patent_app_country] => US [patent_app_date] => 2018-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8479 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17048685 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/048685
Method for controlling resonant power conversion device, and resonant power conversion device Apr 19, 2018 Issued
Array ( [id] => 15923625 [patent_doc_number] => 10659065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Apparatus and methods for phase synchronization of phase-locked loops [patent_app_type] => utility [patent_app_number] => 15/957766 [patent_app_country] => US [patent_app_date] => 2018-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 11591 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15957766 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/957766
Apparatus and methods for phase synchronization of phase-locked loops Apr 18, 2018 Issued
Array ( [id] => 13336005 [patent_doc_number] => 20180219541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/937400 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937400 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937400
SEMICONDUCTOR DEVICE Mar 26, 2018 Abandoned
Array ( [id] => 13470557 [patent_doc_number] => 20180286821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => Integrated Circuit Capable of Operating at Very High Voltage and Method of Fabricating Same [patent_app_type] => utility [patent_app_number] => 15/921775 [patent_app_country] => US [patent_app_date] => 2018-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15921775 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/921775
Integrated circuit capable of operating at very high voltage and method of fabricating same Mar 14, 2018 Issued
Array ( [id] => 17424969 [patent_doc_number] => 11258437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Switching device for disconnecting a current path [patent_app_type] => utility [patent_app_number] => 16/488750 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6363 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16488750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/488750
Switching device for disconnecting a current path Feb 26, 2018 Issued
Array ( [id] => 14037187 [patent_doc_number] => 10230357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-03-12 [patent_title] => Gate control circuit [patent_app_type] => utility [patent_app_number] => 15/901606 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5786 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901606 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901606
Gate control circuit Feb 20, 2018 Issued
Array ( [id] => 14527307 [patent_doc_number] => 10340927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-02 [patent_title] => Digital phase locked loop system [patent_app_type] => utility [patent_app_number] => 15/900002 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4787 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900002 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900002
Digital phase locked loop system Feb 19, 2018 Issued
Array ( [id] => 13394029 [patent_doc_number] => 20180248557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => TRANSMISSION CIRCUIT AND INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/899556 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899556 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/899556
Transmission circuit and integrated circuit Feb 19, 2018 Issued
Array ( [id] => 14813585 [patent_doc_number] => 20190273402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => FOREIGN MATTER DETECTION DEVICE FOR NON-CONTACT POWER SUPPLY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/340397 [patent_app_country] => US [patent_app_date] => 2018-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16340397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/340397
Foreign matter detection device for non-contact power supply system Feb 12, 2018 Issued
Array ( [id] => 14673437 [patent_doc_number] => 10374647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-06 [patent_title] => Adjustable dynamic range signal detection circuit [patent_app_type] => utility [patent_app_number] => 15/895648 [patent_app_country] => US [patent_app_date] => 2018-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3350 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15895648 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/895648
Adjustable dynamic range signal detection circuit Feb 12, 2018 Issued
Array ( [id] => 15923623 [patent_doc_number] => 10659064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-19 [patent_title] => Phase lock loop circuits and methods including multiplexed selection of feedback loop outputs of multiple phase interpolators [patent_app_type] => utility [patent_app_number] => 15/895357 [patent_app_country] => US [patent_app_date] => 2018-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7370 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15895357 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/895357
Phase lock loop circuits and methods including multiplexed selection of feedback loop outputs of multiple phase interpolators Feb 12, 2018 Issued
Array ( [id] => 14723953 [patent_doc_number] => 20190253040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => LEVEL-SHIFTING CIRCUIT CONFIGURED TO LIMIT LEAKAGE CURRENT [patent_app_type] => utility [patent_app_number] => 15/893909 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15893909 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/893909
Level-shifting circuit configured to limit leakage current Feb 11, 2018 Issued
Array ( [id] => 13393971 [patent_doc_number] => 20180248528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => POWER AMPLIFIER USING EQUIVALENT TRANSFORMER [patent_app_type] => utility [patent_app_number] => 15/894675 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15894675 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/894675
Power amplifier using equivalent transformer Feb 11, 2018 Issued
Array ( [id] => 14719185 [patent_doc_number] => 20190250656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => BACK BIAS REGULATOR CIRCUIT AND METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 15/892463 [patent_app_country] => US [patent_app_date] => 2018-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15892463 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/892463
Back bias regulator circuit and method therefor Feb 8, 2018 Issued
Menu