Search

David E. Graybill

Examiner (ID: 6012)

Most Active Art Unit
2894
Art Unit(s)
2812, 1107, 2822, 2827, 1763, 3727, 2894, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11411793 [patent_doc_number] => 09559107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Structure and method for BEOL nanoscale damascene sidewall-defined non-volatile memory element' [patent_app_type] => utility [patent_app_number] => 14/717236 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 5274 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717236 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/717236
Structure and method for BEOL nanoscale damascene sidewall-defined non-volatile memory element May 19, 2015 Issued
Array ( [id] => 10158519 [patent_doc_number] => 09190303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Reducing wafer bonding misalignment by varying thermal treatment prior to bonding' [patent_app_type] => utility [patent_app_number] => 14/716236 [patent_app_country] => US [patent_app_date] => 2015-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5509 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14716236 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/716236
Reducing wafer bonding misalignment by varying thermal treatment prior to bonding May 18, 2015 Issued
Array ( [id] => 11273905 [patent_doc_number] => 20160336452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'Thin Film Transistor and Method of Fabricating the Same, Array Substrate, and Display Device' [patent_app_type] => utility [patent_app_number] => 14/905375 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3318 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14905375 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/905375
Thin Film Transistor and Method of Fabricating the Same, Array Substrate, and Display Device May 17, 2015 Abandoned
Array ( [id] => 11799929 [patent_doc_number] => 09540725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Method and apparatus for beam deflection in a gas cluster ion beam system' [patent_app_type] => utility [patent_app_number] => 14/696063 [patent_app_country] => US [patent_app_date] => 2015-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 35 [patent_no_of_words] => 15090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14696063 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/696063
Method and apparatus for beam deflection in a gas cluster ion beam system Apr 23, 2015 Issued
Array ( [id] => 11273804 [patent_doc_number] => 20160336351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'PIXEL STRUCTURE, ARRAY SUBSTRATE AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/908236 [patent_app_country] => US [patent_app_date] => 2015-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14908236 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/908236
Pixel structure, array substrate and display device Apr 23, 2015 Issued
Array ( [id] => 11180566 [patent_doc_number] => 09412561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Ion implantation method and ion implantation apparatus' [patent_app_type] => utility [patent_app_number] => 14/696060 [patent_app_country] => US [patent_app_date] => 2015-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 13997 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14696060 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/696060
Ion implantation method and ion implantation apparatus Apr 23, 2015 Issued
Array ( [id] => 13976633 [patent_doc_number] => 10217681 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-26 [patent_title] => Gases for low damage selective silicon nitride etching [patent_app_type] => utility [patent_app_number] => 14/694702 [patent_app_country] => US [patent_app_date] => 2015-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 9741 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14694702 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/694702
Gases for low damage selective silicon nitride etching Apr 22, 2015 Issued
Array ( [id] => 10426176 [patent_doc_number] => 20150311188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'Methods of Fabrication and Testing of Three-Dimensional Stacked Integrated Circuit System-In-Package' [patent_app_type] => utility [patent_app_number] => 14/694868 [patent_app_country] => US [patent_app_date] => 2015-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5169 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14694868 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/694868
Methods of fabrication and testing of three-dimensional stacked integrated circuit system-in-package Apr 22, 2015 Issued
Array ( [id] => 11840135 [patent_doc_number] => 20170221855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'METAL PASTE AND USE THEREOF FOR THE CONNECTING OF COMPONENTS' [patent_app_type] => utility [patent_app_number] => 15/308787 [patent_app_country] => US [patent_app_date] => 2015-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5646 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15308787 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/308787
METAL PASTE AND USE THEREOF FOR THE CONNECTING OF COMPONENTS Apr 19, 2015 Abandoned
Array ( [id] => 11293812 [patent_doc_number] => 20160343744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'Liquid Crystal Display Panel, Array Substrate And Manufacturing Method For Thin-Film Transistor' [patent_app_type] => utility [patent_app_number] => 14/893521 [patent_app_country] => US [patent_app_date] => 2015-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2621 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14893521 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/893521
Liquid crystal display panel, array substrate and manufacturing method for thin-film transistor Apr 1, 2015 Issued
Array ( [id] => 13174141 [patent_doc_number] => 10103195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Semiconducting pixel, matrix of such pixels, semiconducting structure for the production of such pixels and their methods of fabrication [patent_app_type] => utility [patent_app_number] => 15/129679 [patent_app_country] => US [patent_app_date] => 2015-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4119 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15129679 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/129679
Semiconducting pixel, matrix of such pixels, semiconducting structure for the production of such pixels and their methods of fabrication Mar 26, 2015 Issued
Array ( [id] => 12257155 [patent_doc_number] => 09929307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-27 [patent_title] => 'Light emitting device, light source system including the light emitting device, and optical coherence tomography including the light source system' [patent_app_type] => utility [patent_app_number] => 15/129162 [patent_app_country] => US [patent_app_date] => 2015-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 49 [patent_no_of_words] => 18295 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15129162 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/129162
Light emitting device, light source system including the light emitting device, and optical coherence tomography including the light source system Mar 24, 2015 Issued
Array ( [id] => 10309346 [patent_doc_number] => 20150194347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'METHODS OF MAKING COMPLIANT SEMICONDUCTOR CHIP PACKAGES' [patent_app_type] => utility [patent_app_number] => 14/662579 [patent_app_country] => US [patent_app_date] => 2015-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5483 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14662579 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/662579
METHODS OF MAKING COMPLIANT SEMICONDUCTOR CHIP PACKAGES Mar 18, 2015 Abandoned
Array ( [id] => 10285907 [patent_doc_number] => 20150170905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'METHODS FOR DEVICE FABRICATION USING PITCH REDUCTION AND RELATED DEVICES' [patent_app_type] => utility [patent_app_number] => 14/635023 [patent_app_country] => US [patent_app_date] => 2015-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635023 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/635023
METHODS FOR DEVICE FABRICATION USING PITCH REDUCTION AND RELATED DEVICES Mar 1, 2015 Abandoned
Array ( [id] => 10487104 [patent_doc_number] => 20150372124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/634863 [patent_app_country] => US [patent_app_date] => 2015-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14634863 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/634863
SEMICONDUCTOR DEVICE Feb 28, 2015 Abandoned
Array ( [id] => 11402067 [patent_doc_number] => 20170022605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'DEPOSITION APPARATUS, METHOD FOR CONTROLLING SAME, DEPOSITION METHOD USING DEPOSITION APPARATUS, AND DEVICE MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 15/124170 [patent_app_country] => US [patent_app_date] => 2015-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14115 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15124170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/124170
DEPOSITION APPARATUS, METHOD FOR CONTROLLING SAME, DEPOSITION METHOD USING DEPOSITION APPARATUS, AND DEVICE MANUFACTURING METHOD Feb 22, 2015 Abandoned
Array ( [id] => 11925667 [patent_doc_number] => 09793256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Optimized configurations to integrate steering diodes in low capacitance transient voltage suppressor (TVS)' [patent_app_type] => utility [patent_app_number] => 14/627750 [patent_app_country] => US [patent_app_date] => 2015-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4943 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14627750 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/627750
Optimized configurations to integrate steering diodes in low capacitance transient voltage suppressor (TVS) Feb 19, 2015 Issued
Array ( [id] => 11043417 [patent_doc_number] => 20160240373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'METHOD FOR FORMING OXIDE LAYER BY OXIDIZING SEMICONDUCTOR SUBSTRATE WITH HYDROGEN PEROXIDE' [patent_app_type] => utility [patent_app_number] => 14/621174 [patent_app_country] => US [patent_app_date] => 2015-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3896 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621174 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621174
METHOD FOR FORMING OXIDE LAYER BY OXIDIZING SEMICONDUCTOR SUBSTRATE WITH HYDROGEN PEROXIDE Feb 11, 2015 Abandoned
Array ( [id] => 10247869 [patent_doc_number] => 20150132865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'METHOD FOR FORMING BUMPS, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME, SUBSTRATE PROCESSING APPARATUS, AND SEMICONDUCTOR MANUFACTURING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/600590 [patent_app_country] => US [patent_app_date] => 2015-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 11444 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14600590 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/600590
METHOD FOR FORMING BUMPS, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME, SUBSTRATE PROCESSING APPARATUS, AND SEMICONDUCTOR MANUFACTURING APPARATUS Jan 19, 2015 Abandoned
Array ( [id] => 11250633 [patent_doc_number] => 09476124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Selective deposition and co-deposition processes for ferromagnetic thin films' [patent_app_type] => utility [patent_app_number] => 14/589487 [patent_app_country] => US [patent_app_date] => 2015-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2652 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14589487 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/589487
Selective deposition and co-deposition processes for ferromagnetic thin films Jan 4, 2015 Issued
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