Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14316929 [patent_doc_number] => 20190148168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => METHOD FOR MANUFACTURING A FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/232611 [patent_app_country] => US [patent_app_date] => 2018-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16232611 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/232611
METHOD FOR MANUFACTURING A FIELD-EFFECT TRANSISTOR Dec 25, 2018 Abandoned
Array ( [id] => 17284103 [patent_doc_number] => 11201145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Semiconductor integrated circuit device having an electrostatic discharge protection circuit and method of manufacturing the semiconductor integrated circuit device [patent_app_type] => utility [patent_app_number] => 16/230598 [patent_app_country] => US [patent_app_date] => 2018-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3350 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16230598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/230598
Semiconductor integrated circuit device having an electrostatic discharge protection circuit and method of manufacturing the semiconductor integrated circuit device Dec 20, 2018 Issued
Array ( [id] => 16896349 [patent_doc_number] => 11037911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Light emitting device [patent_app_type] => utility [patent_app_number] => 16/230591 [patent_app_country] => US [patent_app_date] => 2018-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6381 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16230591 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/230591
Light emitting device Dec 20, 2018 Issued
Array ( [id] => 16553258 [patent_doc_number] => 10886429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Method of manufacturing an optoelectronic device by transferring a conversion structure onto an emission structure [patent_app_type] => utility [patent_app_number] => 16/223806 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6667 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16223806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/223806
Method of manufacturing an optoelectronic device by transferring a conversion structure onto an emission structure Dec 17, 2018 Issued
Array ( [id] => 16759739 [patent_doc_number] => 10978296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Nitride semiconductor substrate, semiconductor laminate, laminated structure, method for manufacturing nitride semiconductor substrate and method for manufacturing semiconductor laminate [patent_app_type] => utility [patent_app_number] => 16/223924 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 26033 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16223924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/223924
Nitride semiconductor substrate, semiconductor laminate, laminated structure, method for manufacturing nitride semiconductor substrate and method for manufacturing semiconductor laminate Dec 17, 2018 Issued
Array ( [id] => 16653650 [patent_doc_number] => 10930843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Process for manufacturing scalable spin-orbit torque (SOT) magnetic memory [patent_app_type] => utility [patent_app_number] => 16/223077 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10392 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16223077 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/223077
Process for manufacturing scalable spin-orbit torque (SOT) magnetic memory Dec 16, 2018 Issued
Array ( [id] => 16789299 [patent_doc_number] => 10991738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Method for producing curved electronic circuits [patent_app_type] => utility [patent_app_number] => 16/179355 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 24 [patent_no_of_words] => 7922 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179355 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/179355
Method for producing curved electronic circuits Nov 1, 2018 Issued
Array ( [id] => 16218666 [patent_doc_number] => 10734489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Method for forming semiconductor device structure with metal silicide layer [patent_app_type] => utility [patent_app_number] => 16/179165 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 46 [patent_no_of_words] => 5756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179165 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/179165
Method for forming semiconductor device structure with metal silicide layer Nov 1, 2018 Issued
Array ( [id] => 13996853 [patent_doc_number] => 20190067584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => METHOD OF MANUFACTURING DISPLAY DEVICE USING DEPOSITION MASK ASSEMBLY [patent_app_type] => utility [patent_app_number] => 16/176012 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176012 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/176012
Method of manufacturing display device using deposition mask assembly Oct 30, 2018 Issued
Array ( [id] => 16339408 [patent_doc_number] => 10790378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Replacement gate structures for advanced integrated circuit structure fabrication [patent_app_type] => utility [patent_app_number] => 16/170600 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 121 [patent_figures_cnt] => 224 [patent_no_of_words] => 73798 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/170600
Replacement gate structures for advanced integrated circuit structure fabrication Oct 24, 2018 Issued
Array ( [id] => 16835355 [patent_doc_number] => 11011616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Gate line plug structures for advanced integrated circuit structure fabrication [patent_app_type] => utility [patent_app_number] => 16/170840 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 121 [patent_figures_cnt] => 224 [patent_no_of_words] => 73888 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170840 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/170840
Gate line plug structures for advanced integrated circuit structure fabrication Oct 24, 2018 Issued
Array ( [id] => 16746527 [patent_doc_number] => 10971530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Manufacturing method for a TFT array substrate and TFT array substrate [patent_app_type] => utility [patent_app_number] => 16/097279 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3790 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16097279 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/097279
Manufacturing method for a TFT array substrate and TFT array substrate Sep 17, 2018 Issued
Array ( [id] => 16707769 [patent_doc_number] => 10957713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => LTPS TFT substrate and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/097277 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4239 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16097277 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/097277
LTPS TFT substrate and manufacturing method thereof Sep 12, 2018 Issued
Array ( [id] => 14984961 [patent_doc_number] => 10446401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/129549 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 17028 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129549
Method of manufacturing semiconductor device Sep 11, 2018 Issued
Array ( [id] => 17181548 [patent_doc_number] => 11158800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Method for patterning quantum dot layer, method for manufacturing display device and transfer template [patent_app_type] => utility [patent_app_number] => 16/129622 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8062 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129622 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129622
Method for patterning quantum dot layer, method for manufacturing display device and transfer template Sep 11, 2018 Issued
Array ( [id] => 17270338 [patent_doc_number] => 11195766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Manufacturing a combined semiconductor device [patent_app_type] => utility [patent_app_number] => 16/129201 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2994 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129201 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129201
Manufacturing a combined semiconductor device Sep 11, 2018 Issued
Array ( [id] => 14381869 [patent_doc_number] => 20190164847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/129592 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129592
Method of manufacturing semiconductor device Sep 11, 2018 Issued
Array ( [id] => 14049593 [patent_doc_number] => 20190080904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => Selective Deposition Defects Removal By Chemical Etch [patent_app_type] => utility [patent_app_number] => 16/129223 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129223 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129223
Selective deposition defects removal by chemical etch Sep 11, 2018 Issued
Array ( [id] => 17196114 [patent_doc_number] => 11164881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Transistor device, memory arrays, and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/127262 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16388 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127262 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/127262
Transistor device, memory arrays, and methods of forming the same Sep 10, 2018 Issued
Array ( [id] => 13848391 [patent_doc_number] => 20190027680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => Magnetic tunnel junction device and magnetic random access memory [patent_app_type] => utility [patent_app_number] => 16/127231 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5985 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127231 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/127231
Magnetic tunnel junction device and magnetic random access memory Sep 10, 2018 Issued
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