Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8166463 [patent_doc_number] => 20120104609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'DISCRETE CIRCUIT COMPONENT HAVING COPPER BLOCK ELECTRODES AND METHOD OF FABRICATION' [patent_app_type] => utility [patent_app_number] => 12/985547 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2773 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20120104609.pdf [firstpage_image] =>[orig_patent_app_number] => 12985547 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985547
DISCRETE CIRCUIT COMPONENT HAVING COPPER BLOCK ELECTRODES AND METHOD OF FABRICATION Jan 5, 2011 Abandoned
Array ( [id] => 6058991 [patent_doc_number] => 20110198762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'PANELIZED PACKAGING WITH TRANSFERRED DIELECTRIC' [patent_app_type] => utility [patent_app_number] => 12/985212 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4228 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20110198762.pdf [firstpage_image] =>[orig_patent_app_number] => 12985212 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985212
PANELIZED PACKAGING WITH TRANSFERRED DIELECTRIC Jan 4, 2011 Abandoned
Array ( [id] => 6189125 [patent_doc_number] => 20110171812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'FABRICATION OF SUBSTRATES WITH A USEFUL LAYER OF MONOCRYSTALLINE SEMICONDUCTOR MATERIAL' [patent_app_type] => utility [patent_app_number] => 12/984895 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7932 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20110171812.pdf [firstpage_image] =>[orig_patent_app_number] => 12984895 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/984895
Fabrication of substrates with a useful layer of monocrystalline semiconductor material Jan 4, 2011 Issued
Array ( [id] => 5940902 [patent_doc_number] => 20110101522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'Multichip semiconductor device, chip therefor and method of formation thereof' [patent_app_type] => utility [patent_app_number] => 12/926104 [patent_app_country] => US [patent_app_date] => 2010-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 16262 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20110101522.pdf [firstpage_image] =>[orig_patent_app_number] => 12926104 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926104
Multichip semiconductor device, chip therefor and method of formation thereof Oct 25, 2010 Issued
Array ( [id] => 8737685 [patent_doc_number] => 08409451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Apparatus for etching substrate and method of fabricating thin-glass substrate' [patent_app_type] => utility [patent_app_number] => 12/881343 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10210 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12881343 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/881343
Apparatus for etching substrate and method of fabricating thin-glass substrate Sep 13, 2010 Issued
Array ( [id] => 8846111 [patent_doc_number] => 08455290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Method of fabricating epitaxial structures' [patent_app_type] => utility [patent_app_number] => 12/807399 [patent_app_country] => US [patent_app_date] => 2010-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2221 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12807399 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/807399
Method of fabricating epitaxial structures Sep 3, 2010 Issued
Array ( [id] => 6609719 [patent_doc_number] => 20100323475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'Integrated circuit device' [patent_app_type] => utility [patent_app_number] => 12/806787 [patent_app_country] => US [patent_app_date] => 2010-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5837 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323475.pdf [firstpage_image] =>[orig_patent_app_number] => 12806787 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/806787
Integrated circuit device Aug 19, 2010 Abandoned
Array ( [id] => 6207631 [patent_doc_number] => 20110132884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'LASER MODULES AND PROCESSES FOR THIN FILM SOLAR PANEL LASER SCRIBING' [patent_app_type] => utility [patent_app_number] => 12/851442 [patent_app_country] => US [patent_app_date] => 2010-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8700 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20110132884.pdf [firstpage_image] =>[orig_patent_app_number] => 12851442 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/851442
LASER MODULES AND PROCESSES FOR THIN FILM SOLAR PANEL LASER SCRIBING Aug 4, 2010 Abandoned
Array ( [id] => 7762230 [patent_doc_number] => 08114789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Formation of a tantalum-nitride layer' [patent_app_type] => utility [patent_app_number] => 12/846253 [patent_app_country] => US [patent_app_date] => 2010-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5269 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/114/08114789.pdf [firstpage_image] =>[orig_patent_app_number] => 12846253 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/846253
Formation of a tantalum-nitride layer Jul 28, 2010 Issued
Array ( [id] => 6591032 [patent_doc_number] => 20100291735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'STACKABLE SEMICONDUCTOR CHIP LAYER COMPRISING PREFABRICATED TRENCH INTERCONNECT VIAS' [patent_app_type] => utility [patent_app_number] => 12/844555 [patent_app_country] => US [patent_app_date] => 2010-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4063 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20100291735.pdf [firstpage_image] =>[orig_patent_app_number] => 12844555 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/844555
STACKABLE SEMICONDUCTOR CHIP LAYER COMPRISING PREFABRICATED TRENCH INTERCONNECT VIAS Jul 26, 2010 Abandoned
Array ( [id] => 6488495 [patent_doc_number] => 20100285622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/842096 [patent_app_country] => US [patent_app_date] => 2010-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4412 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20100285622.pdf [firstpage_image] =>[orig_patent_app_number] => 12842096 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/842096
LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME Jul 22, 2010 Abandoned
Array ( [id] => 6137272 [patent_doc_number] => 20110127555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'SOLID STATE LIGHT EMITTER WITH PHOSPHORS DISPERSED IN A LIQUID OR GAS FOR PRODUCING HIGH CRI WHITE LIGHT' [patent_app_type] => utility [patent_app_number] => 12/840807 [patent_app_country] => US [patent_app_date] => 2010-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10869 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127555.pdf [firstpage_image] =>[orig_patent_app_number] => 12840807 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/840807
SOLID STATE LIGHT EMITTER WITH PHOSPHORS DISPERSED IN A LIQUID OR GAS FOR PRODUCING HIGH CRI WHITE LIGHT Jul 20, 2010 Abandoned
Array ( [id] => 7727657 [patent_doc_number] => 20120012569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'FABRIC CUTTING SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/836083 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11145 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20120012569.pdf [firstpage_image] =>[orig_patent_app_number] => 12836083 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836083
Fabric cutting system and method Jul 13, 2010 Issued
Array ( [id] => 8772294 [patent_doc_number] => 08426249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Chip part manufacturing method and chip parts' [patent_app_type] => utility [patent_app_number] => 12/815784 [patent_app_country] => US [patent_app_date] => 2010-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 6371 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12815784 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/815784
Chip part manufacturing method and chip parts Jun 14, 2010 Issued
Array ( [id] => 6063379 [patent_doc_number] => 20110201160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'METAL-EMBEDDED SUBSTRATE AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/777359 [patent_app_country] => US [patent_app_date] => 2010-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4153 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20110201160.pdf [firstpage_image] =>[orig_patent_app_number] => 12777359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/777359
METAL-EMBEDDED SUBSTRATE AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING THE SAME May 10, 2010 Abandoned
Array ( [id] => 8042375 [patent_doc_number] => 20120070923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'FABRICATION METHOD OF ORGANIC ELECTROLUMINESCENCE DISPLAY HAVING A GETTER LAYER' [patent_app_type] => utility [patent_app_number] => 13/321686 [patent_app_country] => US [patent_app_date] => 2010-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3288 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20120070923.pdf [firstpage_image] =>[orig_patent_app_number] => 13321686 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/321686
FABRICATION METHOD OF ORGANIC ELECTROLUMINESCENCE DISPLAY HAVING A GETTER LAYER May 3, 2010 Abandoned
Array ( [id] => 6161837 [patent_doc_number] => 20110159643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'FABRICATION METHOD OF SEMICONDUCTOR PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/770059 [patent_app_country] => US [patent_app_date] => 2010-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3767 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20110159643.pdf [firstpage_image] =>[orig_patent_app_number] => 12770059 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/770059
Fabrication method of semiconductor package structure Apr 28, 2010 Issued
Array ( [id] => 5995697 [patent_doc_number] => 20110114603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'WIRE CUT ELECTRICAL DISCHARGE MACHINE' [patent_app_type] => utility [patent_app_number] => 12/764020 [patent_app_country] => US [patent_app_date] => 2010-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20110114603.pdf [firstpage_image] =>[orig_patent_app_number] => 12764020 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/764020
WIRE CUT ELECTRICAL DISCHARGE MACHINE Apr 19, 2010 Abandoned
Array ( [id] => 6494751 [patent_doc_number] => 20100200955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'Group III-V nitride based semiconductor substrate and method of making same' [patent_app_type] => utility [patent_app_number] => 12/662461 [patent_app_country] => US [patent_app_date] => 2010-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5644 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200955.pdf [firstpage_image] =>[orig_patent_app_number] => 12662461 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/662461
Group III-V nitride based semiconductor substrate and method of making same Apr 18, 2010 Issued
Array ( [id] => 6500853 [patent_doc_number] => 20100210049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'METHOD OF MAKING A SEMICONDUCTOR CHIP ASSEMBLY WITH A POST/BASE HEAT SPREADER AND DUAL ADHESIVES' [patent_app_type] => utility [patent_app_number] => 12/759699 [patent_app_country] => US [patent_app_date] => 2010-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 20474 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20100210049.pdf [firstpage_image] =>[orig_patent_app_number] => 12759699 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759699
Method of making a semiconductor chip assembly with a post/base heat spreader and dual adhesives Apr 13, 2010 Issued
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