Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6272302 [patent_doc_number] => 20100117242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'TECHNIQUE FOR PACKAGING MULTIPLE INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/267728 [patent_app_country] => US [patent_app_date] => 2008-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20100117242.pdf [firstpage_image] =>[orig_patent_app_number] => 12267728 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/267728
TECHNIQUE FOR PACKAGING MULTIPLE INTEGRATED CIRCUITS Nov 9, 2008 Abandoned
Array ( [id] => 6566684 [patent_doc_number] => 20100320172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'DRIVE DEVICE FOR EROSION TOOLS' [patent_app_type] => utility [patent_app_number] => 12/734507 [patent_app_country] => US [patent_app_date] => 2008-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20100320172.pdf [firstpage_image] =>[orig_patent_app_number] => 12734507 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/734507
Drive device for erosion tools Nov 5, 2008 Issued
Array ( [id] => 6319228 [patent_doc_number] => 20100243612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'ELECTRICAL DISCHARGE MACHINING' [patent_app_type] => utility [patent_app_number] => 12/744502 [patent_app_country] => US [patent_app_date] => 2008-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4765 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20100243612.pdf [firstpage_image] =>[orig_patent_app_number] => 12744502 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/744502
ELECTRICAL DISCHARGE MACHINING Nov 4, 2008 Abandoned
Array ( [id] => 5561653 [patent_doc_number] => 20090134505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/264539 [patent_app_country] => US [patent_app_date] => 2008-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4077 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20090134505.pdf [firstpage_image] =>[orig_patent_app_number] => 12264539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/264539
Semiconductor device and method of manufacturing the same Nov 3, 2008 Issued
Array ( [id] => 214252 [patent_doc_number] => 07617769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'System, method, and apparatus for membrane, pad, and stamper architecture for uniform base layer and nanoimprinting pressure' [patent_app_type] => utility [patent_app_number] => 12/258767 [patent_app_country] => US [patent_app_date] => 2008-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2632 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/617/07617769.pdf [firstpage_image] =>[orig_patent_app_number] => 12258767 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/258767
System, method, and apparatus for membrane, pad, and stamper architecture for uniform base layer and nanoimprinting pressure Oct 26, 2008 Issued
Array ( [id] => 5407446 [patent_doc_number] => 20090121344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'SILICON INTERPOSER AND SEMICONDUCTOR DEVICE PACKAGE AND SEMICONDUCTOR DEVICE INCORPORATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/257669 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5183 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20090121344.pdf [firstpage_image] =>[orig_patent_app_number] => 12257669 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/257669
SILICON INTERPOSER AND SEMICONDUCTOR DEVICE PACKAGE AND SEMICONDUCTOR DEVICE INCORPORATING THE SAME Oct 23, 2008 Abandoned
Array ( [id] => 5409745 [patent_doc_number] => 20090123643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'Electronic Device and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 12/256509 [patent_app_country] => US [patent_app_date] => 2008-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5211 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20090123643.pdf [firstpage_image] =>[orig_patent_app_number] => 12256509 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/256509
Electronic Device and Method for Manufacturing the Same Oct 22, 2008 Abandoned
Array ( [id] => 11259378 [patent_doc_number] => 09484282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Resin-sealed semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/256680 [patent_app_country] => US [patent_app_date] => 2008-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5019 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12256680 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/256680
Resin-sealed semiconductor device Oct 22, 2008 Issued
Array ( [id] => 5262362 [patent_doc_number] => 20090115047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Robust multi-layer wiring elements and assemblies with embedded microelectronic elements' [patent_app_type] => utility [patent_app_number] => 12/287380 [patent_app_country] => US [patent_app_date] => 2008-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8767 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20090115047.pdf [firstpage_image] =>[orig_patent_app_number] => 12287380 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/287380
Robust multi-layer wiring elements and assemblies with embedded microelectronic elements Oct 7, 2008 Abandoned
Array ( [id] => 6375479 [patent_doc_number] => 20100081293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'METHODS FOR FORMING SILICON NITRIDE BASED FILM OR SILICON CARBON BASED FILM' [patent_app_type] => utility [patent_app_number] => 12/243375 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4176 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20100081293.pdf [firstpage_image] =>[orig_patent_app_number] => 12243375 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/243375
METHODS FOR FORMING SILICON NITRIDE BASED FILM OR SILICON CARBON BASED FILM Sep 30, 2008 Abandoned
Array ( [id] => 5282409 [patent_doc_number] => 20090096083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Connecting structure for connecting at least one semiconductor component to a power semiconductor module' [patent_app_type] => utility [patent_app_number] => 12/284190 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2371 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20090096083.pdf [firstpage_image] =>[orig_patent_app_number] => 12284190 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/284190
Connecting structure for connecting at least one semiconductor component to a power semiconductor module Sep 18, 2008 Abandoned
Array ( [id] => 9589196 [patent_doc_number] => 08778736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Capping coating for 3D integration applications' [patent_app_type] => utility [patent_app_number] => 12/192367 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4713 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12192367 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/192367
Capping coating for 3D integration applications Aug 14, 2008 Issued
Array ( [id] => 6475240 [patent_doc_number] => 20100213176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SINKER ELECTRIC DISCHARGE MACHINING METHOD, AND SINKER ELECTRIC DISCHARGE MACHINING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/672669 [patent_app_country] => US [patent_app_date] => 2008-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5861 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20100213176.pdf [firstpage_image] =>[orig_patent_app_number] => 12672669 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/672669
Sinker electric discharge machining method, and sinker electric discharge machining apparatus Aug 6, 2008 Issued
Array ( [id] => 4836764 [patent_doc_number] => 20080277690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER' [patent_app_type] => utility [patent_app_number] => 12/176624 [patent_app_country] => US [patent_app_date] => 2008-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3972 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20080277690.pdf [firstpage_image] =>[orig_patent_app_number] => 12176624 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/176624
STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER Jul 20, 2008 Abandoned
Array ( [id] => 6491219 [patent_doc_number] => 20100200548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'FABRICATION METHOD OF ELECTRODE FOR SPARK SURFACE MODIFICATION, AND SPARK SURFACE MODIFICATION ELECTRODE' [patent_app_type] => utility [patent_app_number] => 12/669402 [patent_app_country] => US [patent_app_date] => 2008-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2763 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200548.pdf [firstpage_image] =>[orig_patent_app_number] => 12669402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/669402
Fabrication method of electrode for spark surface modification, and spark surface modification electrode Jul 15, 2008 Issued
Array ( [id] => 4789406 [patent_doc_number] => 20080290379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS' [patent_app_type] => utility [patent_app_number] => 12/169991 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5729 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20080290379.pdf [firstpage_image] =>[orig_patent_app_number] => 12169991 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/169991
Dual trench isolation for CMOS with hybrid orientations Jul 8, 2008 Issued
Array ( [id] => 4546687 [patent_doc_number] => 07960240 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-06-14 [patent_title] => 'System and method for providing a dual via architecture for thin film resistors' [patent_app_type] => utility [patent_app_number] => 12/217877 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 6412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/960/07960240.pdf [firstpage_image] =>[orig_patent_app_number] => 12217877 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/217877
System and method for providing a dual via architecture for thin film resistors Jul 8, 2008 Issued
Array ( [id] => 4958047 [patent_doc_number] => 20080272471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/145800 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8155 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20080272471.pdf [firstpage_image] =>[orig_patent_app_number] => 12145800 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/145800
ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS Jun 24, 2008 Abandoned
Array ( [id] => 5325765 [patent_doc_number] => 20090063755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'PAPER-SHAPED NON-VOLATILE STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/138880 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2034 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20090063755.pdf [firstpage_image] =>[orig_patent_app_number] => 12138880 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/138880
PAPER-SHAPED NON-VOLATILE STORAGE DEVICE Jun 12, 2008 Abandoned
Array ( [id] => 4708250 [patent_doc_number] => 20080296776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'Method of Manufacturing Electrical Conductors for a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/129325 [patent_app_country] => US [patent_app_date] => 2008-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1732 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20080296776.pdf [firstpage_image] =>[orig_patent_app_number] => 12129325 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/129325
Method of Manufacturing Electrical Conductors for a Semiconductor Device May 28, 2008 Abandoned
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