
David E. Graybill
Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )
| Most Active Art Unit | 2894 |
| Art Unit(s) | 2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814 |
| Total Applications | 1844 |
| Issued Applications | 1278 |
| Pending Applications | 38 |
| Abandoned Applications | 533 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4487635
[patent_doc_number] => 07902649
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-08
[patent_title] => 'Leadframe for leadless package, structure and manufacturing method using the same'
[patent_app_type] => utility
[patent_app_number] => 11/934287
[patent_app_country] => US
[patent_app_date] => 2007-11-02
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/902/07902649.pdf
[firstpage_image] =>[orig_patent_app_number] => 11934287
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/934287 | Leadframe for leadless package, structure and manufacturing method using the same | Nov 1, 2007 | Issued |
Array
(
[id] => 6369113
[patent_doc_number] => 20100075021
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'METHOD, APPARATUS AND PROGRAM FOR FILLING LIQUID MATERIAL'
[patent_app_type] => utility
[patent_app_number] => 12/513250
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[patent_app_date] => 2007-11-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/513250 | Method, apparatus and program for filling liquid material | Oct 31, 2007 | Issued |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2010-11-09
[patent_title] => 'Multichip semiconductor device, chip therefor and method of formation thereof'
[patent_app_type] => utility
[patent_app_number] => 11/980641
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[patent_app_date] => 2007-10-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/980641 | Multichip semiconductor device, chip therefor and method of formation thereof | Oct 30, 2007 | Issued |
Array
(
[id] => 4752617
[patent_doc_number] => 20080160692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'Method for Manufacturing Flash Memory Device'
[patent_app_type] => utility
[patent_app_number] => 11/929948
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[firstpage_image] =>[orig_patent_app_number] => 11929948
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/929948 | Method for Manufacturing Flash Memory Device | Oct 29, 2007 | Abandoned |
Array
(
[id] => 4826018
[patent_doc_number] => 20080124923
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => ' Fabricating Method of Semiconductor Device'
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/929819 | Fabricating Method of Semiconductor Device | Oct 29, 2007 | Abandoned |
Array
(
[id] => 4771972
[patent_doc_number] => 20080057630
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[patent_kind] => A1
[patent_issue_date] => 2008-03-06
[patent_title] => 'Flexible core for enhancement of package interconnect reliablity'
[patent_app_type] => utility
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[pdf_file] => publications/A1/0057/20080057630.pdf
[firstpage_image] =>[orig_patent_app_number] => 11978059
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/978059 | Flexible core for enhancement of package interconnect reliablity | Oct 25, 2007 | Abandoned |
Array
(
[id] => 4648773
[patent_doc_number] => 20080036028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-14
[patent_title] => 'DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS'
[patent_app_type] => utility
[patent_app_number] => 11/877048
[patent_app_country] => US
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[pdf_file] => publications/A1/0036/20080036028.pdf
[firstpage_image] =>[orig_patent_app_number] => 11877048
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/877048 | DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS | Oct 22, 2007 | Abandoned |
Array
(
[id] => 5439367
[patent_doc_number] => 20090091006
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-09
[patent_title] => 'Dual Capillary IC Wirebonding'
[patent_app_type] => utility
[patent_app_number] => 11/867228
[patent_app_country] => US
[patent_app_date] => 2007-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4738
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[pdf_file] => publications/A1/0091/20090091006.pdf
[firstpage_image] =>[orig_patent_app_number] => 11867228
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/867228 | Dual capillary IC wirebonding | Oct 3, 2007 | Issued |
Array
(
[id] => 5425859
[patent_doc_number] => 20090085169
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-02
[patent_title] => 'METHOD OF ACHIEVING ATOMICALLY SMOOTH SIDEWALLS IN DEEP TRENCHES, AND HIGH ASPECT RATIO SILICON STRUCTURE CONTAINING ATOMICALLY SMOOTH SIDEWALLS'
[patent_app_type] => utility
[patent_app_number] => 11/864899
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0085/20090085169.pdf
[firstpage_image] =>[orig_patent_app_number] => 11864899
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/864899 | METHOD OF ACHIEVING ATOMICALLY SMOOTH SIDEWALLS IN DEEP TRENCHES, AND HIGH ASPECT RATIO SILICON STRUCTURE CONTAINING ATOMICALLY SMOOTH SIDEWALLS | Sep 27, 2007 | Abandoned |
Array
(
[id] => 5425885
[patent_doc_number] => 20090085195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-02
[patent_title] => 'Method of Making Microelectronic Package Using Integrated Heat Spreader Stiffener Panel and Microelectronic Package Formed According to the Method'
[patent_app_type] => utility
[patent_app_number] => 11/864279
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11864279
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/864279 | Method of making microelectronic package using integrated heat spreader stiffener panel and microelectronic package formed according to the method | Sep 27, 2007 | Issued |
Array
(
[id] => 7540333
[patent_doc_number] => 08058176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-15
[patent_title] => 'Methods of patterning insulating layers using etching techniques that compensate for etch rate variations'
[patent_app_type] => utility
[patent_app_number] => 11/861478
[patent_app_country] => US
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Array
(
[id] => 5505875
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[patent_issue_date] => 2009-03-26
[patent_title] => 'BONDING PAD STRUCTURE ALLOWING WIRE BONDING OVER AN ACTIVE AREA IN A SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 11/860217
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Array
(
[id] => 5505775
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[patent_title] => 'ALPHA HYDROXY CARBOXYLIC ACID ETCHANTS FOR SILICON MICROSTRUCTURES'
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Array
(
[id] => 5508652
[patent_doc_number] => 20090081859
[patent_country] => US
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[patent_issue_date] => 2009-03-26
[patent_title] => 'Metallization process'
[patent_app_type] => utility
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Array
(
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Array
(
[id] => 4571631
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/893458 | Method for producing semiconductor device | Aug 15, 2007 | Issued |
Array
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