David E. Graybill

Array ( [id] => 4971461 [patent_doc_number] => 20070111463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED p+ SILICON GERMANIUM LAYER' [patent_app_type] => utility [patent_app_number] => 11/620663 [patent_app_country] => US [patent_app_date] => 2007-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3941 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20070111463.pdf [firstpage_image] =>[orig_patent_app_number] => 11620663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4483654 [patent_doc_number] => 07902014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'CMOS devices with a single work function gate electrode and method of fabrication' [patent_app_type] => utility [patent_app_number] => 11/649545 [patent_app_country] => US [patent_app_date] => 2007-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 6988 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902014.pdf [firstpage_image] =>[orig_patent_app_number] => 11649545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5077019 [patent_doc_number] => 20070120243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'Assembly jig and manufacturing method of multilayer semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/646158 [patent_app_country] => US [patent_app_date] => 2006-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5572 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20070120243.pdf [firstpage_image] =>[orig_patent_app_number] => 11646158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 122650 [patent_doc_number] => 07704812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Semiconductor circuit and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/607021 [patent_app_country] => US [patent_app_date] => 2006-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 61 [patent_no_of_words] => 16936 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/704/07704812.pdf [firstpage_image] =>[orig_patent_app_number] => 11607021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4971384 [patent_doc_number] => 20070111386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices' [patent_app_type] => utility [patent_app_number] => 11/603521 [patent_app_country] => US [patent_app_date] => 2006-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20070111386.pdf [firstpage_image] =>[orig_patent_app_number] => 11603521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4980583 [patent_doc_number] => 20070085139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/557483 [patent_app_country] => US [patent_app_date] => 2006-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6375 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20070085139.pdf [firstpage_image] =>[orig_patent_app_number] => 11557483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5104323 [patent_doc_number] => 20070063198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/557481 [patent_app_country] => US [patent_app_date] => 2006-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6375 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063198.pdf [firstpage_image] =>[orig_patent_app_number] => 11557481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 252585 [patent_doc_number] => 07579218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-25 [patent_title] => 'Electronic assembly/system with reduced cost, mass, and volume and increased efficiency and power density' [patent_app_type] => utility [patent_app_number] => 11/588941 [patent_app_country] => US [patent_app_date] => 2006-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 57 [patent_no_of_words] => 8299 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/579/07579218.pdf [firstpage_image] =>[orig_patent_app_number] => 11588941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 42510 [patent_doc_number] => 07781240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/588439 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 47 [patent_no_of_words] => 5819 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/781/07781240.pdf [firstpage_image] =>[orig_patent_app_number] => 11588439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9167150 [patent_doc_number] => 08592831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/588490 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 47 [patent_no_of_words] => 5819 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11588490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4999961 [patent_doc_number] => 20070042595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Packaging of electronic chips with air-bridge structures' [patent_app_type] => utility [patent_app_number] => 11/586876 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3535 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20070042595.pdf [firstpage_image] =>[orig_patent_app_number] => 11586876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 341834 [patent_doc_number] => 07501592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-10 [patent_title] => 'Narrow weighing system arranged in narrowly spaced rows in the lateral direction' [patent_app_type] => utility [patent_app_number] => 11/584663 [patent_app_country] => US [patent_app_date] => 2006-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3862 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/501/07501592.pdf [firstpage_image] =>[orig_patent_app_number] => 11584663 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5148433 [patent_doc_number] => 20070048492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Doped elongated semiconductors, growing such semiconductors, devices including such semiconductors, and fabricating such devices' [patent_app_type] => utility [patent_app_number] => 11/543337 [patent_app_country] => US [patent_app_date] => 2006-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 40048 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20070048492.pdf [firstpage_image] =>[orig_patent_app_number] => 11543337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7545307 [patent_doc_number] => 08053278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Multi-chip package type semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/540754 [patent_app_country] => US [patent_app_date] => 2006-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4008 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053278.pdf [firstpage_image] =>[orig_patent_app_number] => 11540754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5136101 [patent_doc_number] => 20070077730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Method and device for extracting an electronic chip from a silicon wafer and transporting the chip to its installation location on an electronic device' [patent_app_type] => utility [patent_app_number] => 11/529317 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3033 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20070077730.pdf [firstpage_image] =>[orig_patent_app_number] => 11529317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9776768 [patent_doc_number] => 08851964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Poker game with shared common card' [patent_app_type] => utility [patent_app_number] => 12/302888 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5838 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12302888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4517549 [patent_doc_number] => 07932512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-04-26 [patent_title] => 'Implantation before epitaxial growth for photonic integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/528797 [patent_app_country] => US [patent_app_date] => 2006-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5713 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932512.pdf [firstpage_image] =>[orig_patent_app_number] => 11528797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4938927 [patent_doc_number] => 20080076246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Through contact layer opening silicide and barrier layer formation' [patent_app_type] => utility [patent_app_number] => 11/527367 [patent_app_country] => US [patent_app_date] => 2006-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2932 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20080076246.pdf [firstpage_image] =>[orig_patent_app_number] => 11527367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5168023 [patent_doc_number] => 20070068454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Jig for manufacturing semiconductor devices and method for manufacturing the jig' [patent_app_type] => utility [patent_app_number] => 11/524319 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5278 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20070068454.pdf [firstpage_image] =>[orig_patent_app_number] => 11524319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 359604 [patent_doc_number] => 07485483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Methods of fabricating active device array substrate and fabricating color filter substrate' [patent_app_type] => utility [patent_app_number] => 11/533677 [patent_app_country] => US [patent_app_date] => 2006-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485483.pdf [firstpage_image] =>[orig_patent_app_number] => 11533677 [rel_patent_id] =>[rel_patent_doc_number] =>)