Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5720895 [patent_doc_number] => 20060073670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/243397 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4333 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20060073670.pdf [firstpage_image] =>[orig_patent_app_number] => 11243397 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243397
Method of manufacturing a semiconductor device Oct 2, 2005 Abandoned
Array ( [id] => 42635 [patent_doc_number] => 07781326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Formation of a tantalum-nitride layer' [patent_app_type] => utility [patent_app_number] => 11/240189 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5244 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/781/07781326.pdf [firstpage_image] =>[orig_patent_app_number] => 11240189 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240189
Formation of a tantalum-nitride layer Sep 29, 2005 Issued
Array ( [id] => 5136119 [patent_doc_number] => 20070077748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'Method for forming a semiconductor product and semiconductor product' [patent_app_type] => utility [patent_app_number] => 11/241877 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10114 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20070077748.pdf [firstpage_image] =>[orig_patent_app_number] => 11241877 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/241877
Method for forming a semiconductor product and semiconductor product Sep 29, 2005 Abandoned
Array ( [id] => 5171973 [patent_doc_number] => 20070072406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Methods of forming integrated circuit devices having metal interconnect structures therein' [patent_app_type] => utility [patent_app_number] => 11/237987 [patent_app_country] => US [patent_app_date] => 2005-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5579 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20070072406.pdf [firstpage_image] =>[orig_patent_app_number] => 11237987 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/237987
Methods of forming integrated circuit devices having metal interconnect structures therein Sep 27, 2005 Issued
Array ( [id] => 5700185 [patent_doc_number] => 20060216870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'High density SRAM cell with latched vertical transistors' [patent_app_type] => utility [patent_app_number] => 11/234241 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4689 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20060216870.pdf [firstpage_image] =>[orig_patent_app_number] => 11234241 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/234241
High density SRAM cell with latched vertical transistors Sep 25, 2005 Abandoned
Array ( [id] => 5123577 [patent_doc_number] => 20070235847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Method of making a substrate having thermally conductive structures and resulting devices' [patent_app_type] => utility [patent_app_number] => 11/230032 [patent_app_country] => US [patent_app_date] => 2005-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5308 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235847.pdf [firstpage_image] =>[orig_patent_app_number] => 11230032 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/230032
Method of making a substrate having thermally conductive structures and resulting devices Sep 18, 2005 Abandoned
Array ( [id] => 5713293 [patent_doc_number] => 20060076656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Electro-optical device and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 11/225647 [patent_app_country] => US [patent_app_date] => 2005-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8191 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20060076656.pdf [firstpage_image] =>[orig_patent_app_number] => 11225647 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/225647
Electro-optical device and electronic apparatus Sep 12, 2005 Abandoned
Array ( [id] => 5735994 [patent_doc_number] => 20060006384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-12 [patent_title] => 'Special contact points for accessing internal circuitry of an intergrated circuit' [patent_app_type] => utility [patent_app_number] => 11/221231 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9647 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20060006384.pdf [firstpage_image] =>[orig_patent_app_number] => 11221231 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/221231
Special contact points for accessing internal circuitry of an intergrated circuit Sep 5, 2005 Abandoned
Array ( [id] => 5148950 [patent_doc_number] => 20070049010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Disposable pillars for contact formation' [patent_app_type] => utility [patent_app_number] => 11/217980 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7835 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20070049010.pdf [firstpage_image] =>[orig_patent_app_number] => 11217980 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/217980
Disposable pillars for contact formation Aug 31, 2005 Issued
Array ( [id] => 6975505 [patent_doc_number] => 20050285220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Packaging of electronic chips with air-bridge structures' [patent_app_type] => utility [patent_app_number] => 11/216486 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3521 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285220.pdf [firstpage_image] =>[orig_patent_app_number] => 11216486 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216486
Packaging of electronic chips with air-bridge structures Aug 30, 2005 Issued
Array ( [id] => 6977998 [patent_doc_number] => 20050287716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Electronic device package' [patent_app_type] => utility [patent_app_number] => 11/216965 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3330 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287716.pdf [firstpage_image] =>[orig_patent_app_number] => 11216965 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216965
Electronic device package Aug 30, 2005 Abandoned
Array ( [id] => 5724254 [patent_doc_number] => 20060055014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Wireless chip and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 11/213997 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 16628 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20060055014.pdf [firstpage_image] =>[orig_patent_app_number] => 11213997 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213997
Wireless chip and manufacturing method of the same Aug 29, 2005 Issued
Array ( [id] => 5727055 [patent_doc_number] => 20060057815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/212237 [patent_app_country] => US [patent_app_date] => 2005-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 4722 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20060057815.pdf [firstpage_image] =>[orig_patent_app_number] => 11212237 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/212237
Method of manufacturing a semiconductor device Aug 25, 2005 Abandoned
Array ( [id] => 5903660 [patent_doc_number] => 20060046500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Method of cleaning semiconductor substrate, and method of manufacturing semiconductor device and semiconductor substrate processing apparatus for use in the same' [patent_app_type] => utility [patent_app_number] => 11/210737 [patent_app_country] => US [patent_app_date] => 2005-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7016 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046500.pdf [firstpage_image] =>[orig_patent_app_number] => 11210737 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/210737
Method of cleaning semiconductor substrate, and method of manufacturing semiconductor device and semiconductor substrate processing apparatus for use in the same Aug 24, 2005 Abandoned
Array ( [id] => 6928951 [patent_doc_number] => 20050279984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Three dimensional flash cell' [patent_app_type] => utility [patent_app_number] => 11/210389 [patent_app_country] => US [patent_app_date] => 2005-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3628 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20050279984.pdf [firstpage_image] =>[orig_patent_app_number] => 11210389 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/210389
Three dimensional flash cell Aug 23, 2005 Abandoned
Array ( [id] => 4997601 [patent_doc_number] => 20070040235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Dual trench isolation for CMOS with hybrid orientations' [patent_app_type] => utility [patent_app_number] => 11/207216 [patent_app_country] => US [patent_app_date] => 2005-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5657 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20070040235.pdf [firstpage_image] =>[orig_patent_app_number] => 11207216 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/207216
Dual trench isolation for CMOS with hybrid orientations Aug 18, 2005 Abandoned
Array ( [id] => 5800633 [patent_doc_number] => 20060035444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Wafer dividing method' [patent_app_type] => utility [patent_app_number] => 11/198137 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5549 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20060035444.pdf [firstpage_image] =>[orig_patent_app_number] => 11198137 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198137
Wafer dividing method Aug 7, 2005 Issued
Array ( [id] => 7247814 [patent_doc_number] => 20050272172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Method of temporarily securing a die to a burn-in carrier' [patent_app_type] => utility [patent_app_number] => 11/197966 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2802 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20050272172.pdf [firstpage_image] =>[orig_patent_app_number] => 11197966 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/197966
Method of temporarily securing a die to a burn-in carrier Aug 4, 2005 Abandoned
Array ( [id] => 817071 [patent_doc_number] => 07410879 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-08-12 [patent_title] => 'System and method for providing a dual via architecture for thin film resistors' [patent_app_type] => utility [patent_app_number] => 11/196787 [patent_app_country] => US [patent_app_date] => 2005-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 6382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/410/07410879.pdf [firstpage_image] =>[orig_patent_app_number] => 11196787 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/196787
System and method for providing a dual via architecture for thin film resistors Aug 2, 2005 Issued
Array ( [id] => 5763220 [patent_doc_number] => 20060017159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Semiconductor device and method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/185777 [patent_app_country] => US [patent_app_date] => 2005-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4042 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20060017159.pdf [firstpage_image] =>[orig_patent_app_number] => 11185777 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/185777
Semiconductor device and method of manufacturing a semiconductor device Jul 20, 2005 Abandoned
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