
David E. Graybill
Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )
| Most Active Art Unit | 2894 |
| Art Unit(s) | 2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814 |
| Total Applications | 1844 |
| Issued Applications | 1278 |
| Pending Applications | 38 |
| Abandoned Applications | 533 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5720895
[patent_doc_number] => 20060073670
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[patent_kind] => A1
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[patent_title] => 'Method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/243397
[patent_app_country] => US
[patent_app_date] => 2005-10-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/243397 | Method of manufacturing a semiconductor device | Oct 2, 2005 | Abandoned |
Array
(
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[patent_kind] => B2
[patent_issue_date] => 2010-08-24
[patent_title] => 'Formation of a tantalum-nitride layer'
[patent_app_type] => utility
[patent_app_number] => 11/240189
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/240189 | Formation of a tantalum-nitride layer | Sep 29, 2005 | Issued |
Array
(
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[patent_issue_date] => 2007-04-05
[patent_title] => 'Method for forming a semiconductor product and semiconductor product'
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[patent_app_date] => 2005-09-30
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Array
(
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[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Methods of forming integrated circuit devices having metal interconnect structures therein'
[patent_app_type] => utility
[patent_app_number] => 11/237987
[patent_app_country] => US
[patent_app_date] => 2005-09-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/237987 | Methods of forming integrated circuit devices having metal interconnect structures therein | Sep 27, 2005 | Issued |
Array
(
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[patent_issue_date] => 2006-09-28
[patent_title] => 'High density SRAM cell with latched vertical transistors'
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[patent_app_number] => 11/234241
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[patent_app_date] => 2005-09-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/234241 | High density SRAM cell with latched vertical transistors | Sep 25, 2005 | Abandoned |
Array
(
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[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'Method of making a substrate having thermally conductive structures and resulting devices'
[patent_app_type] => utility
[patent_app_number] => 11/230032
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[patent_app_date] => 2005-09-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/230032 | Method of making a substrate having thermally conductive structures and resulting devices | Sep 18, 2005 | Abandoned |
Array
(
[id] => 5713293
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[patent_issue_date] => 2006-04-13
[patent_title] => 'Electro-optical device and electronic apparatus'
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[patent_app_country] => US
[patent_app_date] => 2005-09-13
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[pdf_file] => publications/A1/0076/20060076656.pdf
[firstpage_image] =>[orig_patent_app_number] => 11225647
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/225647 | Electro-optical device and electronic apparatus | Sep 12, 2005 | Abandoned |
Array
(
[id] => 5735994
[patent_doc_number] => 20060006384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-12
[patent_title] => 'Special contact points for accessing internal circuitry of an intergrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/221231
[patent_app_country] => US
[patent_app_date] => 2005-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/221231 | Special contact points for accessing internal circuitry of an intergrated circuit | Sep 5, 2005 | Abandoned |
Array
(
[id] => 5148950
[patent_doc_number] => 20070049010
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Disposable pillars for contact formation'
[patent_app_type] => utility
[patent_app_number] => 11/217980
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[firstpage_image] =>[orig_patent_app_number] => 11217980
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/217980 | Disposable pillars for contact formation | Aug 31, 2005 | Issued |
Array
(
[id] => 6975505
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[patent_kind] => A1
[patent_issue_date] => 2005-12-29
[patent_title] => 'Packaging of electronic chips with air-bridge structures'
[patent_app_type] => utility
[patent_app_number] => 11/216486
[patent_app_country] => US
[patent_app_date] => 2005-08-31
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Array
(
[id] => 6977998
[patent_doc_number] => 20050287716
[patent_country] => US
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[patent_title] => 'Electronic device package'
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[firstpage_image] =>[orig_patent_app_number] => 11216965
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/216965 | Electronic device package | Aug 30, 2005 | Abandoned |
Array
(
[id] => 5724254
[patent_doc_number] => 20060055014
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[patent_issue_date] => 2006-03-16
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Array
(
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Array
(
[id] => 5903660
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[patent_title] => 'Method of cleaning semiconductor substrate, and method of manufacturing semiconductor device and semiconductor substrate processing apparatus for use in the same'
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Array
(
[id] => 6928951
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[patent_issue_date] => 2005-12-22
[patent_title] => 'Three dimensional flash cell'
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Array
(
[id] => 4997601
[patent_doc_number] => 20070040235
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[patent_issue_date] => 2007-02-22
[patent_title] => 'Dual trench isolation for CMOS with hybrid orientations'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/207216 | Dual trench isolation for CMOS with hybrid orientations | Aug 18, 2005 | Abandoned |
Array
(
[id] => 5800633
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[patent_issue_date] => 2006-02-16
[patent_title] => 'Wafer dividing method'
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/185777 | Semiconductor device and method of manufacturing a semiconductor device | Jul 20, 2005 | Abandoned |