Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5073038 [patent_doc_number] => 20070013013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Semiconductor chemical sensor' [patent_app_type] => utility [patent_app_number] => 11/180887 [patent_app_country] => US [patent_app_date] => 2005-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4108 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20070013013.pdf [firstpage_image] =>[orig_patent_app_number] => 11180887 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180887
Semiconductor chemical sensor Jul 13, 2005 Abandoned
Array ( [id] => 5793714 [patent_doc_number] => 20060014395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Method of manufacturing displays and apparatus for manufacturing displays' [patent_app_type] => utility [patent_app_number] => 11/179527 [patent_app_country] => US [patent_app_date] => 2005-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3952 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20060014395.pdf [firstpage_image] =>[orig_patent_app_number] => 11179527 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179527
Method of manufacturing displays and apparatus for manufacturing displays Jul 12, 2005 Issued
Array ( [id] => 7229739 [patent_doc_number] => 20050255636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Microtools for package substrate patterning' [patent_app_type] => utility [patent_app_number] => 11/180437 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3727 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20050255636.pdf [firstpage_image] =>[orig_patent_app_number] => 11180437 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/180437
Microtools for package substrate patterning Jul 11, 2005 Abandoned
Array ( [id] => 5854481 [patent_doc_number] => 20060226414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Group III-V nitride-based semiconductor substrate and method of making same' [patent_app_type] => utility [patent_app_number] => 11/176687 [patent_app_country] => US [patent_app_date] => 2005-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226414.pdf [firstpage_image] =>[orig_patent_app_number] => 11176687 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176687
Group III-V nitride-based semiconductor substrate and method of making same Jul 7, 2005 Abandoned
Array ( [id] => 860247 [patent_doc_number] => 07371624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Method of manufacturing thin film semiconductor device, thin film semiconductor device, electro-optical device, and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 11/175267 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 28 [patent_no_of_words] => 9190 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/371/07371624.pdf [firstpage_image] =>[orig_patent_app_number] => 11175267 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175267
Method of manufacturing thin film semiconductor device, thin film semiconductor device, electro-optical device, and electronic apparatus Jul 6, 2005 Issued
Array ( [id] => 5141863 [patent_doc_number] => 20070004079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips' [patent_app_type] => utility [patent_app_number] => 11/173367 [patent_app_country] => US [patent_app_date] => 2005-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1760 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20070004079.pdf [firstpage_image] =>[orig_patent_app_number] => 11173367 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173367
Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips Jun 29, 2005 Abandoned
Array ( [id] => 5141937 [patent_doc_number] => 20070004153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Method for producing charge-trapping memory cell arrays' [patent_app_type] => utility [patent_app_number] => 11/170187 [patent_app_country] => US [patent_app_date] => 2005-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20070004153.pdf [firstpage_image] =>[orig_patent_app_number] => 11170187 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/170187
Method for producing charge-trapping memory cell arrays Jun 28, 2005 Issued
Array ( [id] => 4464209 [patent_doc_number] => 07935616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Dynamic p-n junction growth' [patent_app_type] => utility [patent_app_number] => 11/165847 [patent_app_country] => US [patent_app_date] => 2005-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5552 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/935/07935616.pdf [firstpage_image] =>[orig_patent_app_number] => 11165847 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/165847
Dynamic p-n junction growth Jun 16, 2005 Issued
Array ( [id] => 5688482 [patent_doc_number] => 20060286797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Grain boundary blocking for stress migration and electromigration improvement in CU interconnects' [patent_app_type] => utility [patent_app_number] => 11/153747 [patent_app_country] => US [patent_app_date] => 2005-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4279 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20060286797.pdf [firstpage_image] =>[orig_patent_app_number] => 11153747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/153747
Grain boundary blocking for stress migration and electromigration improvement in CU interconnects Jun 14, 2005 Issued
Array ( [id] => 5611757 [patent_doc_number] => 20060113683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Doped alloys for electrical interconnects, methods of production and uses thereof' [patent_app_type] => utility [patent_app_number] => 11/147958 [patent_app_country] => US [patent_app_date] => 2005-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9379 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20060113683.pdf [firstpage_image] =>[orig_patent_app_number] => 11147958 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/147958
Doped alloys for electrical interconnects, methods of production and uses thereof Jun 7, 2005 Abandoned
Array ( [id] => 394322 [patent_doc_number] => 07298021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-20 [patent_title] => 'Electronic device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/142300 [patent_app_country] => US [patent_app_date] => 2005-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 5208 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/298/07298021.pdf [firstpage_image] =>[orig_patent_app_number] => 11142300 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/142300
Electronic device and method for manufacturing the same Jun 1, 2005 Issued
Array ( [id] => 7016478 [patent_doc_number] => 20050218495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Microelectronic assembly having encapsulated wire bonding leads' [patent_app_type] => utility [patent_app_number] => 11/142761 [patent_app_country] => US [patent_app_date] => 2005-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 20515 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20050218495.pdf [firstpage_image] =>[orig_patent_app_number] => 11142761 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/142761
Microelectronic assembly having encapsulated wire bonding leads May 31, 2005 Abandoned
Array ( [id] => 5608590 [patent_doc_number] => 20060270106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'System and method for polymer encapsulated solder lid attach' [patent_app_type] => utility [patent_app_number] => 11/140767 [patent_app_country] => US [patent_app_date] => 2005-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20060270106.pdf [firstpage_image] =>[orig_patent_app_number] => 11140767 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/140767
System and method for polymer encapsulated solder lid attach May 30, 2005 Abandoned
Array ( [id] => 7111304 [patent_doc_number] => 20050208760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Interconnects with a dielectric sealant layer' [patent_app_type] => utility [patent_app_number] => 11/138339 [patent_app_country] => US [patent_app_date] => 2005-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3627 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20050208760.pdf [firstpage_image] =>[orig_patent_app_number] => 11138339 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/138339
Interconnects with a dielectric sealant layer May 26, 2005 Issued
Array ( [id] => 5768052 [patent_doc_number] => 20060019454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Method for making a semiconductor device comprising a superlattice dielectric interface layer' [patent_app_type] => utility [patent_app_number] => 11/136747 [patent_app_country] => US [patent_app_date] => 2005-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6094 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20060019454.pdf [firstpage_image] =>[orig_patent_app_number] => 11136747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/136747
Method for making a semiconductor device comprising a superlattice dielectric interface layer May 24, 2005 Issued
Array ( [id] => 7185446 [patent_doc_number] => 20050191788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Low cost magnetic brakes and motion control devices manufactured from conductive loaded resin-based materials' [patent_app_type] => utility [patent_app_number] => 11/121667 [patent_app_country] => US [patent_app_date] => 2005-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7738 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20050191788.pdf [firstpage_image] =>[orig_patent_app_number] => 11121667 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/121667
Low cost magnetic brakes and motion control devices manufactured from conductive loaded resin-based materials May 3, 2005 Abandoned
Array ( [id] => 5422521 [patent_doc_number] => 20090148976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'Method for fabricating semiconductor epitaxial layers using metal islands' [patent_app_type] => utility [patent_app_number] => 11/587500 [patent_app_country] => US [patent_app_date] => 2005-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4016 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20090148976.pdf [firstpage_image] =>[orig_patent_app_number] => 11587500 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/587500
Method for fabricating semiconductor epitaxial layers using metal islands Apr 19, 2005 Issued
Array ( [id] => 5854496 [patent_doc_number] => 20060226429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Method and apparatus for directional organic light emitting diodes' [patent_app_type] => utility [patent_app_number] => 11/102076 [patent_app_country] => US [patent_app_date] => 2005-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1972 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226429.pdf [firstpage_image] =>[orig_patent_app_number] => 11102076 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/102076
Method and apparatus for directional organic light emitting diodes Apr 7, 2005 Abandoned
Array ( [id] => 499842 [patent_doc_number] => 07208828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Semiconductor package with wire bonded stacked dice and multi-layer metal bumps' [patent_app_type] => utility [patent_app_number] => 11/101626 [patent_app_country] => US [patent_app_date] => 2005-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 24 [patent_no_of_words] => 7416 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/208/07208828.pdf [firstpage_image] =>[orig_patent_app_number] => 11101626 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/101626
Semiconductor package with wire bonded stacked dice and multi-layer metal bumps Apr 7, 2005 Issued
Array ( [id] => 6941489 [patent_doc_number] => 20050193537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Modular semiconductor workpiece processing tool' [patent_app_type] => utility [patent_app_number] => 11/101834 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 26355 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20050193537.pdf [firstpage_image] =>[orig_patent_app_number] => 11101834 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/101834
Modular semiconductor workpiece processing tool Apr 6, 2005 Abandoned
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