Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 899924 [patent_doc_number] => 07338882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'Method of fabricating nano SOI wafer and nano SOI wafer fabricated by the same' [patent_app_type] => utility [patent_app_number] => 11/084033 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5462 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/338/07338882.pdf [firstpage_image] =>[orig_patent_app_number] => 11084033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/084033
Method of fabricating nano SOI wafer and nano SOI wafer fabricated by the same Mar 20, 2005 Issued
Array ( [id] => 7197490 [patent_doc_number] => 20050164529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'High-power LGA socket' [patent_app_type] => utility [patent_app_number] => 11/085289 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4610 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20050164529.pdf [firstpage_image] =>[orig_patent_app_number] => 11085289 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/085289
High-power LGA socket Mar 20, 2005 Issued
Array ( [id] => 7183498 [patent_doc_number] => 20050161814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus' [patent_app_type] => utility [patent_app_number] => 11/083926 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11359 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20050161814.pdf [firstpage_image] =>[orig_patent_app_number] => 11083926 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083926
Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus Mar 20, 2005 Abandoned
Array ( [id] => 6941894 [patent_doc_number] => 20050193942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Method for making substrate wafers for low-defect semiconductor components, obtained thereby and uses thereof' [patent_app_type] => utility [patent_app_number] => 11/069117 [patent_app_country] => US [patent_app_date] => 2005-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4418 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20050193942.pdf [firstpage_image] =>[orig_patent_app_number] => 11069117 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/069117
Method for making substrate wafers for low-defect semiconductor components, obtained thereby and uses thereof Feb 28, 2005 Abandoned
Array ( [id] => 7253559 [patent_doc_number] => 20050142792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method of fabricating isolated semiconductor devices in epi-less substrate' [patent_app_type] => utility [patent_app_number] => 11/067248 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 68 [patent_figures_cnt] => 68 [patent_no_of_words] => 14806 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142792.pdf [firstpage_image] =>[orig_patent_app_number] => 11067248 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/067248
Method of fabricating isolated semiconductor devices in epi-less substrate Feb 24, 2005 Issued
Array ( [id] => 7073727 [patent_doc_number] => 20050146994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Storage medium and manufacture thereof' [patent_app_type] => utility [patent_app_number] => 11/067082 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4603 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20050146994.pdf [firstpage_image] =>[orig_patent_app_number] => 11067082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/067082
Storage medium and manufacture thereof Feb 24, 2005 Abandoned
Array ( [id] => 7050916 [patent_doc_number] => 20050186803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/060567 [patent_app_country] => US [patent_app_date] => 2005-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6308 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20050186803.pdf [firstpage_image] =>[orig_patent_app_number] => 11060567 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/060567
Method of manufacturing semiconductor device Feb 17, 2005 Abandoned
Array ( [id] => 7005321 [patent_doc_number] => 20050170634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'High performance system-on-chip discrete components using post passivation process' [patent_app_type] => utility [patent_app_number] => 11/062277 [patent_app_country] => US [patent_app_date] => 2005-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8809 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20050170634.pdf [firstpage_image] =>[orig_patent_app_number] => 11062277 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/062277
High performance system-on-chip discrete components using post passivation process Feb 17, 2005 Issued
Array ( [id] => 5874636 [patent_doc_number] => 20060166509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Method to avoid alpha-Si damage during wet stripping processes in the manufacture of MEMS devices' [patent_app_type] => utility [patent_app_number] => 11/044857 [patent_app_country] => US [patent_app_date] => 2005-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20060166509.pdf [firstpage_image] =>[orig_patent_app_number] => 11044857 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/044857
Method to avoid amorphous-si damage during wet stripping processes in the manufacture of MEMS devices Jan 25, 2005 Issued
Array ( [id] => 5715724 [patent_doc_number] => 20060079087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Method of producing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/041217 [patent_app_country] => US [patent_app_date] => 2005-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9179 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20060079087.pdf [firstpage_image] =>[orig_patent_app_number] => 11041217 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/041217
Method of producing semiconductor device Jan 24, 2005 Abandoned
Array ( [id] => 7039232 [patent_doc_number] => 20050158666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-21 [patent_title] => 'Lateral etch inhibited multiple etch method for etching material etchable with oxygen containing plasma' [patent_app_type] => utility [patent_app_number] => 11/037787 [patent_app_country] => US [patent_app_date] => 2005-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20050158666.pdf [firstpage_image] =>[orig_patent_app_number] => 11037787 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/037787
Lateral etch inhibited multiple etch method for etching material etchable with oxygen containing plasma Jan 17, 2005 Abandoned
Array ( [id] => 7178823 [patent_doc_number] => 20050124132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Self-aligned MIM capacitor process for embedded DRAM' [patent_app_type] => utility [patent_app_number] => 11/031717 [patent_app_country] => US [patent_app_date] => 2005-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20050124132.pdf [firstpage_image] =>[orig_patent_app_number] => 11031717 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/031717
Self-aligned MIM capacitor process for embedded DRAM Jan 6, 2005 Issued
Array ( [id] => 872016 [patent_doc_number] => 07361540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'Method of reducing noise disturbing a signal in an electronic device' [patent_app_type] => utility [patent_app_number] => 11/030809 [patent_app_country] => US [patent_app_date] => 2005-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3201 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/361/07361540.pdf [firstpage_image] =>[orig_patent_app_number] => 11030809 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/030809
Method of reducing noise disturbing a signal in an electronic device Jan 6, 2005 Issued
Array ( [id] => 7136944 [patent_doc_number] => 20050181604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'Method for structuring metal by means of a carbon mask' [patent_app_type] => utility [patent_app_number] => 11/030587 [patent_app_country] => US [patent_app_date] => 2005-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2320 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20050181604.pdf [firstpage_image] =>[orig_patent_app_number] => 11030587 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/030587
Method for structuring metal by means of a carbon mask Jan 5, 2005 Abandoned
Array ( [id] => 359683 [patent_doc_number] => 07485562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Method of making multichip wafer level packages and computing systems incorporating same' [patent_app_type] => utility [patent_app_number] => 11/028374 [patent_app_country] => US [patent_app_date] => 2005-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 5023 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485562.pdf [firstpage_image] =>[orig_patent_app_number] => 11028374 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/028374
Method of making multichip wafer level packages and computing systems incorporating same Jan 2, 2005 Issued
Array ( [id] => 7172346 [patent_doc_number] => 20050122773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Self-aligned, low-ressistance, efficient memory array' [patent_app_type] => utility [patent_app_number] => 11/025913 [patent_app_country] => US [patent_app_date] => 2005-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3498 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20050122773.pdf [firstpage_image] =>[orig_patent_app_number] => 11025913 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/025913
Self-aligned, low-resistance, efficient memory array Jan 2, 2005 Issued
Array ( [id] => 7253588 [patent_doc_number] => 20050142804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method for fabricating shallow trench isolation structure of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/026917 [patent_app_country] => US [patent_app_date] => 2004-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1846 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142804.pdf [firstpage_image] =>[orig_patent_app_number] => 11026917 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/026917
Method for fabricating shallow trench isolation structure of semiconductor device Dec 29, 2004 Abandoned
Array ( [id] => 6918952 [patent_doc_number] => 20050096513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Wearable biomonitor with flexible thinned integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/003429 [patent_app_country] => US [patent_app_date] => 2004-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5196 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20050096513.pdf [firstpage_image] =>[orig_patent_app_number] => 11003429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/003429
Wearable biomonitor with flexible thinned integrated circuit Dec 5, 2004 Abandoned
Array ( [id] => 7218031 [patent_doc_number] => 20050077077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Chip package with degassing holes' [patent_app_type] => utility [patent_app_number] => 11/000255 [patent_app_country] => US [patent_app_date] => 2004-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3813 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20050077077.pdf [firstpage_image] =>[orig_patent_app_number] => 11000255 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/000255
Chip package with degassing holes Nov 29, 2004 Issued
Array ( [id] => 6918300 [patent_doc_number] => 20050095861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'GaN single-crystal substrate, nitride type semiconductor epitaxial substrate, nitride type semiconductor device, and methods of making the same' [patent_app_type] => utility [patent_app_number] => 10/997887 [patent_app_country] => US [patent_app_date] => 2004-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5924 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20050095861.pdf [firstpage_image] =>[orig_patent_app_number] => 10997887 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/997887
GaN single-crystal substrate, nitride type semiconductor epitaxial substrate, nitride type semiconductor device, and methods of making the same Nov 28, 2004 Abandoned
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