
David E. Graybill
Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )
| Most Active Art Unit | 2894 |
| Art Unit(s) | 2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814 |
| Total Applications | 1844 |
| Issued Applications | 1278 |
| Pending Applications | 38 |
| Abandoned Applications | 533 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5724256
[patent_doc_number] => 20060055016
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Chip package assembly produced thereby'
[patent_app_type] => utility
[patent_app_number] => 10/995487
[patent_app_country] => US
[patent_app_date] => 2004-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3242
[patent_no_of_claims] => 49
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0055/20060055016.pdf
[firstpage_image] =>[orig_patent_app_number] => 10995487
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/995487 | Chip package assembly produced thereby | Nov 23, 2004 | Abandoned |
Array
(
[id] => 5745743
[patent_doc_number] => 20060108672
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-25
[patent_title] => 'Die bonded device and method for transistor packages'
[patent_app_type] => utility
[patent_app_number] => 10/996677
[patent_app_country] => US
[patent_app_date] => 2004-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2312
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20060108672.pdf
[firstpage_image] =>[orig_patent_app_number] => 10996677
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/996677 | Die bonded device and method for transistor packages | Nov 23, 2004 | Abandoned |
Array
(
[id] => 830365
[patent_doc_number] => 07399919
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-15
[patent_title] => 'Flexible heat sink'
[patent_app_type] => utility
[patent_app_number] => 10/995647
[patent_app_country] => US
[patent_app_date] => 2004-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 30
[patent_no_of_words] => 15829
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/399/07399919.pdf
[firstpage_image] =>[orig_patent_app_number] => 10995647
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/995647 | Flexible heat sink | Nov 22, 2004 | Issued |
Array
(
[id] => 7101492
[patent_doc_number] => 20050104218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-19
[patent_title] => 'High frequency circuit chip and method of producing the same'
[patent_app_type] => utility
[patent_app_number] => 10/993197
[patent_app_country] => US
[patent_app_date] => 2004-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7098
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20050104218.pdf
[firstpage_image] =>[orig_patent_app_number] => 10993197
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/993197 | High frequency circuit chip and method of producing the same | Nov 18, 2004 | Abandoned |
Array
(
[id] => 7072756
[patent_doc_number] => 20050146022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Apparatus for housing a micromechanical structure and method for producing the same'
[patent_app_type] => utility
[patent_app_number] => 10/992627
[patent_app_country] => US
[patent_app_date] => 2004-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 9687
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0146/20050146022.pdf
[firstpage_image] =>[orig_patent_app_number] => 10992627
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/992627 | Apparatus for housing a micromechanical structure and method for producing the same | Nov 16, 2004 | Issued |
Array
(
[id] => 6988754
[patent_doc_number] => 20050087855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Microelectronic component and assembly having leads with offset portions'
[patent_app_type] => utility
[patent_app_number] => 10/990015
[patent_app_country] => US
[patent_app_date] => 2004-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 20879
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0087/20050087855.pdf
[firstpage_image] =>[orig_patent_app_number] => 10990015
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/990015 | Microelectronic component and assembly having leads with offset portions | Nov 15, 2004 | Abandoned |
Array
(
[id] => 6936573
[patent_doc_number] => 20050110134
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'Electronic circuit unit with semiconductor components disposed on both surfaces of board'
[patent_app_type] => utility
[patent_app_number] => 10/988737
[patent_app_country] => US
[patent_app_date] => 2004-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3190
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20050110134.pdf
[firstpage_image] =>[orig_patent_app_number] => 10988737
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/988737 | Electronic circuit unit with semiconductor components disposed on both surfaces of board | Nov 14, 2004 | Abandoned |
Array
(
[id] => 844082
[patent_doc_number] => 07388279
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-17
[patent_title] => 'Tapered dielectric and conductor structures and applications thereof'
[patent_app_type] => utility
[patent_app_number] => 10/987187
[patent_app_country] => US
[patent_app_date] => 2004-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2584
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/388/07388279.pdf
[firstpage_image] =>[orig_patent_app_number] => 10987187
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/987187 | Tapered dielectric and conductor structures and applications thereof | Nov 11, 2004 | Issued |
Array
(
[id] => 7008441
[patent_doc_number] => 20050062157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Substrate with terminal pads having respective single solder bumps formed thereon'
[patent_app_type] => utility
[patent_app_number] => 10/980788
[patent_app_country] => US
[patent_app_date] => 2004-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5277
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 37
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20050062157.pdf
[firstpage_image] =>[orig_patent_app_number] => 10980788
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/980788 | Substrate with terminal pads having respective single solder bumps formed thereon | Nov 3, 2004 | Abandoned |
Array
(
[id] => 5814307
[patent_doc_number] => 20060084283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-20
[patent_title] => 'Low temperature sin deposition methods'
[patent_app_type] => utility
[patent_app_number] => 10/970317
[patent_app_country] => US
[patent_app_date] => 2004-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4202
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0084/20060084283.pdf
[firstpage_image] =>[orig_patent_app_number] => 10970317
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/970317 | Low temperature sin deposition methods | Oct 19, 2004 | Abandoned |
Array
(
[id] => 7162116
[patent_doc_number] => 20050085089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Etching apparatus, semiconductor devices and methods of fabricating semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 10/956607
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1730
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20050085089.pdf
[firstpage_image] =>[orig_patent_app_number] => 10956607
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/956607 | Etching apparatus, semiconductor devices and methods of fabricating semiconductor devices | Sep 29, 2004 | Abandoned |
Array
(
[id] => 344720
[patent_doc_number] => 07497905
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-03
[patent_title] => 'Ternary nitride-based buffer layer of a nitride-based light-emitting device and a method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/711567
[patent_app_country] => US
[patent_app_date] => 2004-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2616
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/497/07497905.pdf
[firstpage_image] =>[orig_patent_app_number] => 10711567
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/711567 | Ternary nitride-based buffer layer of a nitride-based light-emitting device and a method for manufacturing the same | Sep 23, 2004 | Issued |
Array
(
[id] => 6990601
[patent_doc_number] => 20050089638
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Nano-material thermal and electrical contact system'
[patent_app_type] => utility
[patent_app_number] => 10/943803
[patent_app_country] => US
[patent_app_date] => 2004-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4940
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20050089638.pdf
[firstpage_image] =>[orig_patent_app_number] => 10943803
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/943803 | Nano-material thermal and electrical contact system | Sep 15, 2004 | Abandoned |
Array
(
[id] => 7127476
[patent_doc_number] => 20050059220
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/937257
[patent_app_country] => US
[patent_app_date] => 2004-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 6315
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0059/20050059220.pdf
[firstpage_image] =>[orig_patent_app_number] => 10937257
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/937257 | Semiconductor device and method of manufacturing the same | Sep 9, 2004 | Abandoned |
Array
(
[id] => 7009151
[patent_doc_number] => 20050062867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Semiconductor device, and control method and device for driving unit component of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/936127
[patent_app_country] => US
[patent_app_date] => 2004-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10621
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20050062867.pdf
[firstpage_image] =>[orig_patent_app_number] => 10936127
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/936127 | Semiconductor device, and control method and device for driving unit component of semiconductor device | Sep 7, 2004 | Issued |
Array
(
[id] => 408639
[patent_doc_number] => 07285764
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-23
[patent_title] => 'Solid state imaging device and method of driving the same'
[patent_app_type] => utility
[patent_app_number] => 10/936227
[patent_app_country] => US
[patent_app_date] => 2004-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 37
[patent_no_of_words] => 20076
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 284
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/285/07285764.pdf
[firstpage_image] =>[orig_patent_app_number] => 10936227
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/936227 | Solid state imaging device and method of driving the same | Sep 7, 2004 | Issued |
Array
(
[id] => 915446
[patent_doc_number] => 07327035
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-05
[patent_title] => 'System and method for providing a low frequency filter pole'
[patent_app_type] => utility
[patent_app_number] => 10/936407
[patent_app_country] => US
[patent_app_date] => 2004-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4314
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/327/07327035.pdf
[firstpage_image] =>[orig_patent_app_number] => 10936407
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/936407 | System and method for providing a low frequency filter pole | Sep 7, 2004 | Issued |
Array
(
[id] => 616762
[patent_doc_number] => 07145175
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-05
[patent_title] => 'Semiconductor circuit and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/934997
[patent_app_country] => US
[patent_app_date] => 2004-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 61
[patent_no_of_words] => 16903
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/145/07145175.pdf
[firstpage_image] =>[orig_patent_app_number] => 10934997
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/934997 | Semiconductor circuit and method of fabricating the same | Sep 6, 2004 | Issued |
Array
(
[id] => 5708074
[patent_doc_number] => 20060049418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-09
[patent_title] => 'Epitaxial structure and fabrication method of nitride semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/934857
[patent_app_country] => US
[patent_app_date] => 2004-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2490
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20060049418.pdf
[firstpage_image] =>[orig_patent_app_number] => 10934857
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/934857 | Epitaxial structure and fabrication method of nitride semiconductor device | Sep 2, 2004 | Abandoned |
Array
(
[id] => 638208
[patent_doc_number] => 07126154
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-24
[patent_title] => 'Test structure for a single-sided buried strap DRAM memory cell array'
[patent_app_type] => utility
[patent_app_number] => 10/933497
[patent_app_country] => US
[patent_app_date] => 2004-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4631
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/126/07126154.pdf
[firstpage_image] =>[orig_patent_app_number] => 10933497
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/933497 | Test structure for a single-sided buried strap DRAM memory cell array | Sep 2, 2004 | Issued |