Search

David E. Graybill

Examiner (ID: 16212, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2894, 2827, 1763, 2812, 3727, 1107, 2822, 2814
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7154651 [patent_doc_number] => 20050026351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Packaging of electronic chips with air-bridge structures' [patent_app_type] => utility [patent_app_number] => 10/931510 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3523 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20050026351.pdf [firstpage_image] =>[orig_patent_app_number] => 10931510 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931510
Packaging of electronic chips with air-bridge structures Aug 31, 2004 Issued
Array ( [id] => 7083388 [patent_doc_number] => 20050048768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Apparatus and method for forming interconnects' [patent_app_type] => utility [patent_app_number] => 10/924767 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12783 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20050048768.pdf [firstpage_image] =>[orig_patent_app_number] => 10924767 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924767
Apparatus and method for forming interconnects Aug 24, 2004 Abandoned
Array ( [id] => 7080656 [patent_doc_number] => 20050046036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Semiconductor device, semiconductor module and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/924967 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9252 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20050046036.pdf [firstpage_image] =>[orig_patent_app_number] => 10924967 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924967
Semiconductor device, semiconductor module and method of manufacturing semiconductor device Aug 24, 2004 Abandoned
Array ( [id] => 7148008 [patent_doc_number] => 20050023681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Viscous fluid transfer apparatus and transfer method, electronic component mounting apparatus and mounting method, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/925767 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 52 [patent_no_of_words] => 24642 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023681.pdf [firstpage_image] =>[orig_patent_app_number] => 10925767 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/925767
Viscous fluid transfer apparatus and transfer method, electronic component mounting apparatus and mounting method, and semiconductor device Aug 24, 2004 Abandoned
Array ( [id] => 7008443 [patent_doc_number] => 20050062159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Semiconductor devices and methods of forming a barrier metal in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/925777 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20050062159.pdf [firstpage_image] =>[orig_patent_app_number] => 10925777 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/925777
Semiconductor devices and methods of forming a barrier metal in semiconductor devices Aug 24, 2004 Issued
Array ( [id] => 5588842 [patent_doc_number] => 20060038293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Inter-metal dielectric fill' [patent_app_type] => utility [patent_app_number] => 10/924707 [patent_app_country] => US [patent_app_date] => 2004-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3657 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20060038293.pdf [firstpage_image] =>[orig_patent_app_number] => 10924707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924707
Inter-metal dielectric fill Aug 22, 2004 Abandoned
Array ( [id] => 7025593 [patent_doc_number] => 20050019987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Large area flat image sensor assembly' [patent_app_type] => utility [patent_app_number] => 10/922529 [patent_app_country] => US [patent_app_date] => 2004-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3908 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20050019987.pdf [firstpage_image] =>[orig_patent_app_number] => 10922529 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/922529
Large area flat image sensor assembly Aug 19, 2004 Issued
Array ( [id] => 5588851 [patent_doc_number] => 20060038302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Thermal fatigue resistant tin-lead-silver solder' [patent_app_type] => utility [patent_app_number] => 10/922037 [patent_app_country] => US [patent_app_date] => 2004-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2603 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20060038302.pdf [firstpage_image] =>[orig_patent_app_number] => 10922037 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/922037
Thermal fatigue resistant tin-lead-silver solder Aug 18, 2004 Abandoned
Array ( [id] => 7022974 [patent_doc_number] => 20050017368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps' [patent_app_type] => utility [patent_app_number] => 10/921497 [patent_app_country] => US [patent_app_date] => 2004-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4724 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20050017368.pdf [firstpage_image] =>[orig_patent_app_number] => 10921497 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/921497
Multi-level redistribution layer traces for reducing current crowding in flipchip solder bumps Aug 17, 2004 Abandoned
Array ( [id] => 7120357 [patent_doc_number] => 20050012186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Lead for integrated circuit package' [patent_app_type] => utility [patent_app_number] => 10/920957 [patent_app_country] => US [patent_app_date] => 2004-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7605 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20050012186.pdf [firstpage_image] =>[orig_patent_app_number] => 10920957 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920957
Lead for integrated circuit package Aug 17, 2004 Abandoned
Array ( [id] => 6981186 [patent_doc_number] => 20050151254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/918355 [patent_app_country] => US [patent_app_date] => 2004-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5911 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20050151254.pdf [firstpage_image] =>[orig_patent_app_number] => 10918355 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/918355
Semiconductor device Aug 15, 2004 Issued
Array ( [id] => 7086680 [patent_doc_number] => 20050006792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/914235 [patent_app_country] => US [patent_app_date] => 2004-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5895 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20050006792.pdf [firstpage_image] =>[orig_patent_app_number] => 10914235 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/914235
Semiconductor device and method of manufacturing the same Aug 9, 2004 Issued
Array ( [id] => 7191617 [patent_doc_number] => 20050040535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Conductive film and method for preparing the same' [patent_app_type] => utility [patent_app_number] => 10/911577 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 12221 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20050040535.pdf [firstpage_image] =>[orig_patent_app_number] => 10911577 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911577
Conductive film and method for preparing the same Aug 4, 2004 Issued
Array ( [id] => 7253201 [patent_doc_number] => 20050142707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method of crystallizing/activating polysilicon layer and method of fabricating thin film transistor having the same polysilicon layer' [patent_app_type] => utility [patent_app_number] => 10/909457 [patent_app_country] => US [patent_app_date] => 2004-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2256 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20050142707.pdf [firstpage_image] =>[orig_patent_app_number] => 10909457 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/909457
Method of crystallizing/activating polysilicon layer and method of fabricating thin film transistor having the same polysilicon layer Aug 2, 2004 Issued
Array ( [id] => 7061294 [patent_doc_number] => 20050003655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'MOCVD process using ozone as a reactant to deposit a metal oxide barrier layer' [patent_app_type] => utility [patent_app_number] => 10/909527 [patent_app_country] => US [patent_app_date] => 2004-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4786 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20050003655.pdf [firstpage_image] =>[orig_patent_app_number] => 10909527 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/909527
MOCVD process using ozone as a reactant to deposit a metal oxide barrier layer Aug 1, 2004 Abandoned
Array ( [id] => 485336 [patent_doc_number] => 07217578 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-15 [patent_title] => 'Advanced process control of thermal oxidation processes, and systems for accomplishing same' [patent_app_type] => utility [patent_app_number] => 10/909497 [patent_app_country] => US [patent_app_date] => 2004-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4755 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/217/07217578.pdf [firstpage_image] =>[orig_patent_app_number] => 10909497 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/909497
Advanced process control of thermal oxidation processes, and systems for accomplishing same Aug 1, 2004 Issued
Array ( [id] => 5820588 [patent_doc_number] => 20060024901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Method for fabricating a high-frequency and high-power semiconductor module' [patent_app_type] => utility [patent_app_number] => 10/909877 [patent_app_country] => US [patent_app_date] => 2004-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 909 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20060024901.pdf [firstpage_image] =>[orig_patent_app_number] => 10909877 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/909877
Method for fabricating a high-frequency and high-power semiconductor module Aug 1, 2004 Abandoned
Array ( [id] => 902838 [patent_doc_number] => 07335517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Multichip semiconductor device, chip therefor and method of formation thereof' [patent_app_type] => utility [patent_app_number] => 10/902391 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 76 [patent_no_of_words] => 16287 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/335/07335517.pdf [firstpage_image] =>[orig_patent_app_number] => 10902391 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/902391
Multichip semiconductor device, chip therefor and method of formation thereof Jul 29, 2004 Issued
Array ( [id] => 7058956 [patent_doc_number] => 20050001315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Method for assembling integral type electronic device, and integral type electronic device' [patent_app_type] => utility [patent_app_number] => 10/902135 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2467 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20050001315.pdf [firstpage_image] =>[orig_patent_app_number] => 10902135 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/902135
Method for assembling integral type electronic device, and integral type electronic device Jul 29, 2004 Abandoned
Array ( [id] => 445872 [patent_doc_number] => 07253034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Dual SIMOX hybrid orientation technology (HOT) substrates' [patent_app_type] => utility [patent_app_number] => 10/902557 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 40 [patent_no_of_words] => 6372 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/253/07253034.pdf [firstpage_image] =>[orig_patent_app_number] => 10902557 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/902557
Dual SIMOX hybrid orientation technology (HOT) substrates Jul 28, 2004 Issued
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