Search

David E. Graybill

Examiner (ID: 353, Phone: (571)272-1930 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2812, 2814, 1107, 2822, 3727, 2827, 1763, 2894
Total Applications
1844
Issued Applications
1278
Pending Applications
38
Abandoned Applications
533

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16684339 [patent_doc_number] => 10943830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Self-aligned structure for semiconductor devices [patent_app_type] => utility [patent_app_number] => 15/724411 [patent_app_country] => US [patent_app_date] => 2017-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 47 [patent_no_of_words] => 18721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15724411 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/724411
Self-aligned structure for semiconductor devices Oct 3, 2017 Issued
Array ( [id] => 14137801 [patent_doc_number] => 20190103290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => THERMAL VAPOR CHAMBER ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 15/724251 [patent_app_country] => US [patent_app_date] => 2017-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15724251 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/724251
THERMAL VAPOR CHAMBER ARRANGEMENT Oct 2, 2017 Abandoned
Array ( [id] => 12739360 [patent_doc_number] => 20180138287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/724181 [patent_app_country] => US [patent_app_date] => 2017-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15724181 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/724181
METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE Oct 2, 2017 Abandoned
Array ( [id] => 12263797 [patent_doc_number] => 20180082993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'OPTIMIZED CONFIGURATIONS TO INTEGRATE STEERING DIODES IN LOW CAPACITANCE TRANSIENT VOLTAGE SUPPRESSOR (TVS)' [patent_app_type] => utility [patent_app_number] => 15/721883 [patent_app_country] => US [patent_app_date] => 2017-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4995 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15721883 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/721883
Optimized configurations to integrate steering diodes in low capacitance transient voltage suppressor (TVS) Sep 29, 2017 Issued
Array ( [id] => 12129283 [patent_doc_number] => 20180012869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES, AND SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS' [patent_app_type] => utility [patent_app_number] => 15/695291 [patent_app_country] => US [patent_app_date] => 2017-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10834 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/695291
Methods of forming bonded semiconductor structures, and semiconductor structures formed by such methods Sep 4, 2017 Issued
Array ( [id] => 13936029 [patent_doc_number] => 20190051530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => MANUFACTURING METHOD OF INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/675811 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/675811
Manufacturing method of integrated circuit Aug 13, 2017 Issued
Array ( [id] => 12188635 [patent_doc_number] => 20180047572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'DRESSING DEVICE, POLISHING APPARATUS, HOLDER, HOUSING AND DRESSING METHOD' [patent_app_type] => utility [patent_app_number] => 15/675442 [patent_app_country] => US [patent_app_date] => 2017-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10148 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/675442
Dressing device, polishing apparatus, holder, housing and dressing method Aug 10, 2017 Issued
Array ( [id] => 13878529 [patent_doc_number] => 20190035605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => METHOD OF DEPOSITING FILM BY PEALD USING NEGATIVE BIAS [patent_app_type] => utility [patent_app_number] => 15/659631 [patent_app_country] => US [patent_app_date] => 2017-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15659631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/659631
Method of depositing film by PEALD using negative bias Jul 25, 2017 Issued
Array ( [id] => 14300731 [patent_doc_number] => 10290496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Substrate processing apparatus and substrate processing method [patent_app_type] => utility [patent_app_number] => 15/660563 [patent_app_country] => US [patent_app_date] => 2017-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 12690 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15660563 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/660563
Substrate processing apparatus and substrate processing method Jul 25, 2017 Issued
Array ( [id] => 14525733 [patent_doc_number] => 10340137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Monolayer film mediated precision film deposition [patent_app_type] => utility [patent_app_number] => 15/658133 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1925 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15658133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/658133
Monolayer film mediated precision film deposition Jul 23, 2017 Issued
Array ( [id] => 12813655 [patent_doc_number] => 20180163055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => COMPOSITION FOR FORMING SILICA LAYER, METHOD FOR MANUFACTURING SILICA LAYER, AND ELECTRIC DEVICE INCLUDING SILICA LAYER [patent_app_type] => utility [patent_app_number] => 15/656341 [patent_app_country] => US [patent_app_date] => 2017-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15656341 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/656341
Composition for forming silica layer, method for manufacturing silica layer, and electric device including silica layer Jul 20, 2017 Issued
Array ( [id] => 12162374 [patent_doc_number] => 20180033640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'HEAT TREATMENT METHOD FOR P-TYPE SEMICONDUCTOR' [patent_app_type] => utility [patent_app_number] => 15/655835 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9178 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655835 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655835
HEAT TREATMENT METHOD FOR P-TYPE SEMICONDUCTOR Jul 19, 2017 Abandoned
Array ( [id] => 11939697 [patent_doc_number] => 20170243848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'SOLDER BUMPS FORMED ON WAFERS USING PREFORMED SOLDER BALLS WITH DIFFERENT COMPOSITIONS AND SIZES' [patent_app_type] => utility [patent_app_number] => 15/591611 [patent_app_country] => US [patent_app_date] => 2017-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7610 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15591611 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/591611
SOLDER BUMPS FORMED ON WAFERS USING PREFORMED SOLDER BALLS WITH DIFFERENT COMPOSITIONS AND SIZES May 9, 2017 Abandoned
Array ( [id] => 11939798 [patent_doc_number] => 20170243949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'LIQUID CRYSTAL DISPLAY PANEL, ARRAY SUBSTRATE AND MANUFACTURING METHOD FOR THIN-FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/591420 [patent_app_country] => US [patent_app_date] => 2017-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2695 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15591420 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/591420
LIQUID CRYSTAL DISPLAY PANEL, ARRAY SUBSTRATE AND MANUFACTURING METHOD FOR THIN-FILM TRANSISTOR May 9, 2017 Abandoned
Array ( [id] => 11851886 [patent_doc_number] => 20170226378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'Method for Manufacturing an Optical Semiconductor Device and a Silicone Resin Composition Therefor' [patent_app_type] => utility [patent_app_number] => 15/497773 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7943 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15497773 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/497773
Method for Manufacturing an Optical Semiconductor Device and a Silicone Resin Composition Therefor Apr 25, 2017 Abandoned
Array ( [id] => 14350847 [patent_doc_number] => 20190157396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => AN APPARATUS AND METHOD OF FORMING AN APPARATUS COMPRISING A GRAPHENE FIELD EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/097593 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16097593 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/097593
AN APPARATUS AND METHOD OF FORMING AN APPARATUS COMPRISING A GRAPHENE FIELD EFFECT TRANSISTOR Apr 19, 2017 Abandoned
Array ( [id] => 15641539 [patent_doc_number] => 10593781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Semiconductor device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 15/491270 [patent_app_country] => US [patent_app_date] => 2017-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5282 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15491270 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/491270
Semiconductor device and fabrication method thereof Apr 18, 2017 Issued
Array ( [id] => 12005713 [patent_doc_number] => 20170309868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'Mask and Masking Assembly' [patent_app_type] => utility [patent_app_number] => 15/491351 [patent_app_country] => US [patent_app_date] => 2017-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4961 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15491351 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/491351
Mask and masking assembly Apr 18, 2017 Issued
Array ( [id] => 12181614 [patent_doc_number] => 20180040549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/485794 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 15508 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485794 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485794
Printed circuit board and semiconductor package including the same Apr 11, 2017 Issued
Array ( [id] => 12174893 [patent_doc_number] => 09893041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Method of forming an array of a multi-device unit cell' [patent_app_type] => utility [patent_app_number] => 15/485747 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 35 [patent_no_of_words] => 10966 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485747 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485747
Method of forming an array of a multi-device unit cell Apr 11, 2017 Issued
Menu