David E. Graybill

Array ( [id] => 3924253 [patent_doc_number] => 05972053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Capacitor formed within printed circuit board' [patent_app_type] => 1 [patent_app_number] => 9/014953 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3048 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/972/05972053.pdf [firstpage_image] =>[orig_patent_app_number] => 014953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4177361 [patent_doc_number] => 06037192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Process of assembling an integrated circuit and a terminal substrate using solder reflow and adhesive cure' [patent_app_type] => 1 [patent_app_number] => 9/012008 [patent_app_country] => US [patent_app_date] => 1998-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 3064 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/037/06037192.pdf [firstpage_image] =>[orig_patent_app_number] => 012008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1225161 [patent_doc_number] => 06700184 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'Lead frame and semiconductor device having the same' [patent_app_type] => B1 [patent_app_number] => 09/009248 [patent_app_country] => US [patent_app_date] => 1998-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 31 [patent_no_of_words] => 5418 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/700/06700184.pdf [firstpage_image] =>[orig_patent_app_number] => 09009248 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4183360 [patent_doc_number] => 06042623 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Two-wafer loadlock wafer processing apparatus and loading and unloading method therefor' [patent_app_type] => 1 [patent_app_number] => 9/005862 [patent_app_country] => US [patent_app_date] => 1998-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8736 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/042/06042623.pdf [firstpage_image] =>[orig_patent_app_number] => 005862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4087151 [patent_doc_number] => 06054764 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Integrated circuit with tightly coupled passive components' [patent_app_type] => 1 [patent_app_number] => 8/992701 [patent_app_country] => US [patent_app_date] => 1997-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2367 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054764.pdf [firstpage_image] =>[orig_patent_app_number] => 992701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3941277 [patent_doc_number] => 05989939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Process of manufacturing compliant wirebond packages' [patent_app_type] => 1 [patent_app_number] => 8/989368 [patent_app_country] => US [patent_app_date] => 1997-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 28 [patent_no_of_words] => 6532 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/989/05989939.pdf [firstpage_image] =>[orig_patent_app_number] => 989368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4086753 [patent_doc_number] => 06096100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method for processing wafers and cleaning wafer-handling implements' [patent_app_type] => 1 [patent_app_number] => 8/989957 [patent_app_country] => US [patent_app_date] => 1997-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4280 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096100.pdf [firstpage_image] =>[orig_patent_app_number] => 989957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1579229 [patent_doc_number] => 06423102 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Jig used for assembling semiconductor devices' [patent_app_type] => B1 [patent_app_number] => 08/987054 [patent_app_country] => US [patent_app_date] => 1997-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 7513 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423102.pdf [firstpage_image] =>[orig_patent_app_number] => 08987054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4065087 [patent_doc_number] => 06068669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Compliant interconnect for testing a semiconductor die' [patent_app_type] => 1 [patent_app_number] => 8/980466 [patent_app_country] => US [patent_app_date] => 1997-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 23 [patent_no_of_words] => 5612 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/068/06068669.pdf [firstpage_image] =>[orig_patent_app_number] => 980466 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3968619 [patent_doc_number] => 05904505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Process for producing encapsulated semiconductor device having metal foil material covering and metal foil' [patent_app_type] => 1 [patent_app_number] => 8/977053 [patent_app_country] => US [patent_app_date] => 1997-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 6876 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/904/05904505.pdf [firstpage_image] =>[orig_patent_app_number] => 977053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4198368 [patent_doc_number] => 06077321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Wet/dry substrate processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/966295 [patent_app_country] => US [patent_app_date] => 1997-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6245 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/077/06077321.pdf [firstpage_image] =>[orig_patent_app_number] => 966295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4120142 [patent_doc_number] => 06046496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Chip package' [patent_app_type] => 1 [patent_app_number] => 8/964091 [patent_app_country] => US [patent_app_date] => 1997-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5645 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046496.pdf [firstpage_image] =>[orig_patent_app_number] => 964091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4097414 [patent_doc_number] => 06048741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices' [patent_app_type] => 1 [patent_app_number] => 8/962199 [patent_app_country] => US [patent_app_date] => 1997-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3835 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/048/06048741.pdf [firstpage_image] =>[orig_patent_app_number] => 962199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4132665 [patent_doc_number] => 06127724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Packaged microelectronic elements with enhanced thermal conduction' [patent_app_type] => 1 [patent_app_number] => 8/962988 [patent_app_country] => US [patent_app_date] => 1997-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8266 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127724.pdf [firstpage_image] =>[orig_patent_app_number] => 962988 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4317313 [patent_doc_number] => 06328768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Semiconductor device manufacturing line' [patent_app_type] => 1 [patent_app_number] => 8/958157 [patent_app_country] => US [patent_app_date] => 1997-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2780 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/328/06328768.pdf [firstpage_image] =>[orig_patent_app_number] => 958157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3990584 [patent_doc_number] => 05891745 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Test and tear-away bond pad design' [patent_app_type] => 1 [patent_app_number] => 8/946403 [patent_app_country] => US [patent_app_date] => 1997-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1570 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/891/05891745.pdf [firstpage_image] =>[orig_patent_app_number] => 946403 [rel_patent_id] =>[rel_patent_doc_number] =>)